Re: [PATCH] mv64361: Add dummy gigabit ethernet PHY access registers

[BALATON Zoltan]

On Wed, 21 Jun 2023, BALATON Zoltan wrote:
> On Wed, 14 Jun 2023, BALATON Zoltan wrote:
> > On Mon, 5 Jun 2023, BALATON Zoltan wrote:
> > > We don't emulate the gigabit ethernet part of the chip but the MorphOS
> > > driver accesses these and expects to get some valid looking result
> > > otherwise it hangs. Add some minimal dummy implementation to avoid rhis.
> > >
> > > Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
> > > ---
> > > This is only used by MorphOS on pegasos2 so most likely could go via
> > > the ppc queue.
> >
> > Ping?
>
> Ping?

Ping?
20230605215145.29458746335@zero.eik.bme.hu/">https://patchew.org/QEMU/20230605215145.29458746335@zero.eik.bme.hu/
It's unlikely this will get a review so can you please just merge it? It's 
my code so if I break it I'll fix it but this was tested a bit and no 
problem reported so far.

Regards,
BALATON Zoltan

> > > hw/pci-host/mv64361.c | 6 ++++++
> > > hw/pci-host/mv643xx.h | 3 +++
> > > 2 files changed, 9 insertions(+)
> > >
> > > diff --git a/hw/pci-host/mv64361.c b/hw/pci-host/mv64361.c
> > > index 19e8031a3f..01bd8c887f 100644
> > > --- a/hw/pci-host/mv64361.c
> > > +++ b/hw/pci-host/mv64361.c
> > > @@ -541,6 +541,12 @@ static uint64_t mv64361_read(void *opaque, hwaddr 
> > > addr, unsigned int size)
> > >             }
> > >         }
> > >         break;
> > > +    case MV64340_ETH_PHY_ADDR:
> > > +        ret = 0x98;
> > > +        break;
> > > +    case MV64340_ETH_SMI:
> > > +        ret = BIT(27);
> > > +        break;
> > >     case MV64340_CUNIT_ARBITER_CONTROL_REG:
> > >         ret = 0x11ff0000 | (s->gpp_int_level << 10);
> > >         break;
> > > diff --git a/hw/pci-host/mv643xx.h b/hw/pci-host/mv643xx.h
> > > index cd26a43f18..f2e1baea88 100644
> > > --- a/hw/pci-host/mv643xx.h
> > > +++ b/hw/pci-host/mv643xx.h
> > > @@ -656,6 +656,9 @@
> > > /*        Ethernet Unit Registers       */
> > > /****************************************/
> > >
> > > +#define MV64340_ETH_PHY_ADDR 
> > > 0x2000
> > > +#define MV64340_ETH_SMI 
> > > 0x2004
> > > +
> > > /*******************************************/
> > > /*          CUNIT  Registers               */
> > > /*******************************************/