qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH 2/2] pnv/psi: Initialize the PSIHB interrupts to match hardwa


From: Cédric Le Goater
Subject: Re: [PATCH 2/2] pnv/psi: Initialize the PSIHB interrupts to match hardware
Date: Fri, 30 Jun 2023 16:59:37 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.12.0

On 6/30/23 16:42, Frederic Barrat wrote:
On P9/P10, the PSIHB interrupts are initialized with a PQ state of
0b01, i.e. interrupts are disabled. However the real hardware
initializes them to 0b00 for the PSIHB. This patch updates it, in case
an hypervisor is in the mood of checking it.

Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>


Reviewed-by: Cédric Le Goater <clg@kaod.org>

Thanks,

C.


---
  hw/ppc/pnv_psi.c | 2 ++
  1 file changed, 2 insertions(+)

diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c
index 46da58dff8..f232935d27 100644
--- a/hw/ppc/pnv_psi.c
+++ b/hw/ppc/pnv_psi.c
@@ -863,6 +863,8 @@ static void pnv_psi_power9_realize(DeviceState *dev, Error 
**errp)
      object_property_set_int(OBJECT(xsrc), "nr-irqs", PSIHB9_NUM_IRQS,
                              &error_fatal);
      object_property_set_link(OBJECT(xsrc), "xive", OBJECT(psi), &error_abort);
+    object_property_set_int(OBJECT(xsrc), "pq-init", XIVE_ESB_RESET,
+                            &error_abort);
      if (!qdev_realize(DEVICE(xsrc), NULL, errp)) {
          return;
      }




reply via email to

[Prev in Thread] Current Thread [Next in Thread]