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[PATCH v2 06/14] tcg/loongarch64: Lower neg_vec to vneg
From: |
Jiajie Chen |
Subject: |
[PATCH v2 06/14] tcg/loongarch64: Lower neg_vec to vneg |
Date: |
Fri, 1 Sep 2023 17:30:59 +0800 |
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/loongarch64/tcg-target.c.inc | 8 ++++++++
tcg/loongarch64/tcg-target.h | 2 +-
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index 20e25dc490..16bcc2cf1b 100644
--- a/tcg/loongarch64/tcg-target.c.inc
+++ b/tcg/loongarch64/tcg-target.c.inc
@@ -1653,6 +1653,9 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
static const LoongArchInsn sub_vec_imm_insn[4] = {
OPC_VSUBI_BU, OPC_VSUBI_HU, OPC_VSUBI_WU, OPC_VSUBI_DU
};
+ static const LoongArchInsn neg_vec_insn[4] = {
+ OPC_VNEG_B, OPC_VNEG_H, OPC_VNEG_W, OPC_VNEG_D
+ };
a0 = args[0];
a1 = args[1];
@@ -1785,6 +1788,9 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
}
tcg_out32(s, encode_vdvjvk_insn(sub_vec_insn[vece], a0, a1, a2));
break;
+ case INDEX_op_neg_vec:
+ tcg_out32(s, encode_vdvj_insn(neg_vec_insn[vece], a0, a1));
+ break;
case INDEX_op_dupm_vec:
tcg_out_dupm_vec(s, type, vece, a0, a1, a2);
break;
@@ -1810,6 +1816,7 @@ int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type,
unsigned vece)
case INDEX_op_xor_vec:
case INDEX_op_nor_vec:
case INDEX_op_not_vec:
+ case INDEX_op_neg_vec:
return 1;
default:
return 0;
@@ -1987,6 +1994,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode
op)
return C_O1_I2(w, w, w);
case INDEX_op_not_vec:
+ case INDEX_op_neg_vec:
return C_O1_I1(w, w);
default:
diff --git a/tcg/loongarch64/tcg-target.h b/tcg/loongarch64/tcg-target.h
index bf72b26ca2..c992c4b297 100644
--- a/tcg/loongarch64/tcg-target.h
+++ b/tcg/loongarch64/tcg-target.h
@@ -176,7 +176,7 @@ extern bool use_lsx_instructions;
#define TCG_TARGET_HAS_v256 0
#define TCG_TARGET_HAS_not_vec 1
-#define TCG_TARGET_HAS_neg_vec 0
+#define TCG_TARGET_HAS_neg_vec 1
#define TCG_TARGET_HAS_abs_vec 0
#define TCG_TARGET_HAS_andc_vec 1
#define TCG_TARGET_HAS_orc_vec 1
--
2.42.0
- Re: [PATCH v2 03/14] tcg/loongarch64: Lower cmp_vec to vseq/vsle/vslt, (continued)
[PATCH v2 04/14] tcg/loongarch64: Lower add/sub_vec to vadd/vsub, Jiajie Chen, 2023/09/01
[PATCH v2 02/14] tcg/loongarch64: Lower basic tcg vec ops to LSX, Jiajie Chen, 2023/09/01
[PATCH v2 05/14] tcg/loongarch64: Lower vector bitwise operations, Jiajie Chen, 2023/09/01
[PATCH v2 06/14] tcg/loongarch64: Lower neg_vec to vneg,
Jiajie Chen <=
[PATCH v2 07/14] tcg/loongarch64: Lower mul_vec to vmul, Jiajie Chen, 2023/09/01
[PATCH v2 08/14] tcg/loongarch64: Lower vector min max ops, Jiajie Chen, 2023/09/01
[PATCH v2 09/14] tcg/loongarch64: Lower vector saturated ops, Jiajie Chen, 2023/09/01
[PATCH v2 10/14] tcg/loongarch64: Lower vector shift vector ops, Jiajie Chen, 2023/09/01
[PATCH v2 01/14] tcg/loongarch64: Import LSX instructions, Jiajie Chen, 2023/09/01
[PATCH v2 11/14] tcg/loongarch64: Lower bitsel_vec to vbitsel, Jiajie Chen, 2023/09/01
[PATCH v2 13/14] tcg/loongarch64: Lower rotv_vec ops to LSX, Jiajie Chen, 2023/09/01
[PATCH v2 12/14] tcg/loongarch64: Lower vector shift integer ops, Jiajie Chen, 2023/09/01