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[PULL 01/26] aspeed: Introduce helper for 32-bit hosts limitation
From: |
Cédric Le Goater |
Subject: |
[PULL 01/26] aspeed: Introduce helper for 32-bit hosts limitation |
Date: |
Fri, 1 Sep 2023 11:41:49 +0200 |
On 32-bit hosts, RAM has a 2047 MB limit. Use a macro to define the
default ram size of machines (AST2600 SoC) that can have 2 GB.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
hw/arm/aspeed.c | 21 +++++++++------------
1 file changed, 9 insertions(+), 12 deletions(-)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 263626abeae1..b922a2c491cc 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -47,6 +47,13 @@ struct AspeedMachineState {
char *spi_model;
};
+/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */
+#if HOST_LONG_BITS == 32
+#define ASPEED_RAM_SIZE(sz) MIN((sz), 1 * GiB)
+#else
+#define ASPEED_RAM_SIZE(sz) (sz)
+#endif
+
/* Palmetto hardware value: 0x120CE416 */
#define PALMETTO_BMC_HW_STRAP1 ( \
SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) | \
@@ -1423,12 +1430,7 @@ static void
aspeed_machine_rainier_class_init(ObjectClass *oc, void *data)
aspeed_soc_num_cpus(amc->soc_name);
};
-/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */
-#if HOST_LONG_BITS == 32
-#define FUJI_BMC_RAM_SIZE (1 * GiB)
-#else
-#define FUJI_BMC_RAM_SIZE (2 * GiB)
-#endif
+#define FUJI_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB)
static void aspeed_machine_fuji_class_init(ObjectClass *oc, void *data)
{
@@ -1450,12 +1452,7 @@ static void aspeed_machine_fuji_class_init(ObjectClass
*oc, void *data)
aspeed_soc_num_cpus(amc->soc_name);
};
-/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */
-#if HOST_LONG_BITS == 32
-#define BLETCHLEY_BMC_RAM_SIZE (1 * GiB)
-#else
-#define BLETCHLEY_BMC_RAM_SIZE (2 * GiB)
-#endif
+#define BLETCHLEY_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB)
static void aspeed_machine_bletchley_class_init(ObjectClass *oc, void *data)
{
--
2.41.0
- [PULL 00/26] aspeed queue, Cédric Le Goater, 2023/09/01
- [PULL 01/26] aspeed: Introduce helper for 32-bit hosts limitation,
Cédric Le Goater <=
- [PULL 02/26] hw/i2c/aspeed: Fix Tx count and Rx size error in buffer pool mode, Cédric Le Goater, 2023/09/01
- [PULL 03/26] hw/i2c/aspeed: Fix TXBUF transmission start position error, Cédric Le Goater, 2023/09/01
- [PULL 05/26] tests/avocado/machine_aspeed.py: Update SDK images, Cédric Le Goater, 2023/09/01
- [PULL 06/26] hw/ssi: Add a "cs" property to SSIPeripheral, Cédric Le Goater, 2023/09/01
- [PULL 04/26] hw/i2c/aspeed: Add support for buffer organization, Cédric Le Goater, 2023/09/01
- [PULL 07/26] hw/ssi: Introduce a ssi_get_cs() helper, Cédric Le Goater, 2023/09/01
- [PULL 09/26] hw/ssi: Check for duplicate CS indexes, Cédric Le Goater, 2023/09/01
- [PULL 08/26] aspeed/smc: Wire CS lines at reset, Cédric Le Goater, 2023/09/01
- [PULL 11/26] m25p80: Introduce an helper to retrieve the BlockBackend of a device, Cédric Le Goater, 2023/09/01
- [PULL 12/26] aspeed: Get the BlockBackend of FMC0 from the flash device, Cédric Le Goater, 2023/09/01