[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v9 20/20] target/riscv/cpu.c: consider user option with RVG
From: |
Daniel Henrique Barboza |
Subject: |
[PATCH v9 20/20] target/riscv/cpu.c: consider user option with RVG |
Date: |
Fri, 1 Sep 2023 16:46:26 -0300 |
Enabling RVG will enable a set of extensions that we're not checking if
the user was okay enabling or not. And in this case we want to error
out, instead of ignoring, otherwise we will be inconsistent enabling RVG
without all its extensions.
After this patch, disabling ifencei or icsr while enabling RVG will
result in error:
$ ./build/qemu-system-riscv64 -M virt -cpu rv64,g=true,Zifencei=false
--nographic
qemu-system-riscv64: RVG requires Zifencei but user set Zifencei to false
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/cpu.c | 18 ++++++++++++++++--
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 78382cb5f2..be1c028095 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1153,9 +1153,23 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu,
Error **errp)
riscv_has_ext(env, RVA) && riscv_has_ext(env, RVF) &&
riscv_has_ext(env, RVD) &&
cpu->cfg.ext_icsr && cpu->cfg.ext_ifencei)) {
+
+ if (cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_icsr)) &&
+ !cpu->cfg.ext_icsr) {
+ error_setg(errp, "RVG requires Zicsr but user set Zicsr to false");
+ return;
+ }
+
+ if (cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_ifencei)) &&
+ !cpu->cfg.ext_ifencei) {
+ error_setg(errp, "RVG requires Zifencei but user set "
+ "Zifencei to false");
+ return;
+ }
+
warn_report("Setting G will also set IMAFD_Zicsr_Zifencei");
- cpu->cfg.ext_icsr = true;
- cpu->cfg.ext_ifencei = true;
+ cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_icsr), true);
+ cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_ifencei), true);
env->misa_ext |= RVI | RVM | RVA | RVF | RVD;
env->misa_ext_mask |= RVI | RVM | RVA | RVF | RVD;
--
2.41.0
- [PATCH v9 14/20] target/riscv: make CPUCFG() macro public, (continued)
- [PATCH v9 14/20] target/riscv: make CPUCFG() macro public, Daniel Henrique Barboza, 2023/09/01
- [PATCH v9 13/20] target/riscv/cpu.c: use offset in isa_ext_is_enabled/update_enabled, Daniel Henrique Barboza, 2023/09/01
- [PATCH v9 15/20] target/riscv/cpu.c: introduce cpu_cfg_ext_auto_update(), Daniel Henrique Barboza, 2023/09/01
- [PATCH v9 16/20] target/riscv/cpu.c: use cpu_cfg_ext_auto_update() during realize(), Daniel Henrique Barboza, 2023/09/01
- [PATCH v9 19/20] target/riscv/cpu.c: honor user choice in cpu_cfg_ext_auto_update(), Daniel Henrique Barboza, 2023/09/01
- [PATCH v9 18/20] target/riscv: use isa_ext_update_enabled() in init_max_cpu_extensions(), Daniel Henrique Barboza, 2023/09/01
- [PATCH v9 17/20] target/riscv/cpu.c: introduce RISCVCPUMultiExtConfig, Daniel Henrique Barboza, 2023/09/01
- [PATCH v9 20/20] target/riscv/cpu.c: consider user option with RVG,
Daniel Henrique Barboza <=
- Re: [PATCH v9 00/20] riscv: 'max' CPU, detect user choice in TCG, Alistair Francis, 2023/09/07
- Re: [PATCH v9 00/20] riscv: 'max' CPU, detect user choice in TCG, Alistair Francis, 2023/09/10