[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v10 13/20] target/riscv/cpu.c: use offset in isa_ext_is_enabled/u
From: |
Daniel Henrique Barboza |
Subject: |
[PATCH v10 13/20] target/riscv/cpu.c: use offset in isa_ext_is_enabled/update_enabled |
Date: |
Tue, 12 Sep 2023 10:24:16 -0300 |
We'll have future usage for a function where, given an offset of the
struct RISCVCPUConfig, the flag is updated to a certain val.
Change all existing callers to use edata->ext_enable_offset instead of
'edata'.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
target/riscv/cpu.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 447913636c..032fad8e03 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -162,18 +162,17 @@ static const struct isa_ext_data isa_edata_arr[] = {
ISA_EXT_DATA_ENTRY(xventanacondops, PRIV_VERSION_1_12_0,
ext_XVentanaCondOps),
};
-static bool isa_ext_is_enabled(RISCVCPU *cpu,
- const struct isa_ext_data *edata)
+static bool isa_ext_is_enabled(RISCVCPU *cpu, uint32_t ext_offset)
{
- bool *ext_enabled = (void *)&cpu->cfg + edata->ext_enable_offset;
+ bool *ext_enabled = (void *)&cpu->cfg + ext_offset;
return *ext_enabled;
}
-static void isa_ext_update_enabled(RISCVCPU *cpu,
- const struct isa_ext_data *edata, bool en)
+static void isa_ext_update_enabled(RISCVCPU *cpu, uint32_t ext_offset,
+ bool en)
{
- bool *ext_enabled = (void *)&cpu->cfg + edata->ext_enable_offset;
+ bool *ext_enabled = (void *)&cpu->cfg + ext_offset;
*ext_enabled = en;
}
@@ -1045,9 +1044,10 @@ static void
riscv_cpu_disable_priv_spec_isa_exts(RISCVCPU *cpu)
/* Force disable extensions if priv spec version does not match */
for (i = 0; i < ARRAY_SIZE(isa_edata_arr); i++) {
- if (isa_ext_is_enabled(cpu, &isa_edata_arr[i]) &&
+ if (isa_ext_is_enabled(cpu, isa_edata_arr[i].ext_enable_offset) &&
(env->priv_ver < isa_edata_arr[i].min_version)) {
- isa_ext_update_enabled(cpu, &isa_edata_arr[i], false);
+ isa_ext_update_enabled(cpu, isa_edata_arr[i].ext_enable_offset,
+ false);
#ifndef CONFIG_USER_ONLY
warn_report("disabling %s extension for hart 0x" TARGET_FMT_lx
" because privilege spec version does not match",
@@ -2344,7 +2344,7 @@ static void riscv_isa_string_ext(RISCVCPU *cpu, char
**isa_str,
int i;
for (i = 0; i < ARRAY_SIZE(isa_edata_arr); i++) {
- if (isa_ext_is_enabled(cpu, &isa_edata_arr[i])) {
+ if (isa_ext_is_enabled(cpu, isa_edata_arr[i].ext_enable_offset)) {
new = g_strconcat(old, "_", isa_edata_arr[i].name, NULL);
g_free(old);
old = new;
--
2.41.0
- [PATCH v10 04/20] target/riscv: add DEFINE_PROP_END_OF_LIST() to riscv_cpu_options[], (continued)
- [PATCH v10 04/20] target/riscv: add DEFINE_PROP_END_OF_LIST() to riscv_cpu_options[], Daniel Henrique Barboza, 2023/09/12
- [PATCH v10 05/20] target/riscv/cpu.c: split non-ratified exts from riscv_cpu_extensions[], Daniel Henrique Barboza, 2023/09/12
- [PATCH v10 06/20] target/riscv/cpu.c: split vendor exts from riscv_cpu_extensions[], Daniel Henrique Barboza, 2023/09/12
- [PATCH v10 03/20] target/riscv/cpu.c: split kvm prop handling to its own helper, Daniel Henrique Barboza, 2023/09/12
- [PATCH v10 08/20] target/riscv/cpu.c: add riscv_cpu_add_kvm_unavail_prop_array(), Daniel Henrique Barboza, 2023/09/12
- [PATCH v10 09/20] target/riscv/cpu.c: limit cfg->vext_spec log message, Daniel Henrique Barboza, 2023/09/12
- [PATCH v10 10/20] target/riscv: add 'max' CPU type, Daniel Henrique Barboza, 2023/09/12
- [PATCH v10 11/20] avocado, risc-v: add tuxboot tests for 'max' CPU, Daniel Henrique Barboza, 2023/09/12
- [PATCH v10 12/20] target/riscv: deprecate the 'any' CPU type, Daniel Henrique Barboza, 2023/09/12
- [PATCH v10 13/20] target/riscv/cpu.c: use offset in isa_ext_is_enabled/update_enabled,
Daniel Henrique Barboza <=
- [PATCH v10 14/20] target/riscv: make CPUCFG() macro public, Daniel Henrique Barboza, 2023/09/12
- [PATCH v10 15/20] target/riscv/cpu.c: introduce cpu_cfg_ext_auto_update(), Daniel Henrique Barboza, 2023/09/12
- [PATCH v10 17/20] target/riscv/cpu.c: introduce RISCVCPUMultiExtConfig, Daniel Henrique Barboza, 2023/09/12
- [PATCH v10 16/20] target/riscv/cpu.c: use cpu_cfg_ext_auto_update() during realize(), Daniel Henrique Barboza, 2023/09/12
- [PATCH v10 18/20] target/riscv: use isa_ext_update_enabled() in init_max_cpu_extensions(), Daniel Henrique Barboza, 2023/09/12
- [PATCH v10 19/20] target/riscv/cpu.c: honor user choice in cpu_cfg_ext_auto_update(), Daniel Henrique Barboza, 2023/09/12
- [PATCH v10 20/20] target/riscv/cpu.c: consider user option with RVG, Daniel Henrique Barboza, 2023/09/12
- Re: [PATCH v10 00/20] riscv: 'max' CPU, detect user choice in TCG, Alistair Francis, 2023/09/17