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Re: [RFC PATCH 7/8] aspeed: Add uhci support for ast2600


From: Cédric Le Goater
Subject: Re: [RFC PATCH 7/8] aspeed: Add uhci support for ast2600
Date: Mon, 9 Sep 2024 09:49:48 +0200
User-agent: Mozilla Thunderbird

On 9/6/24 14:25, Guenter Roeck wrote:
Enable UHCO support for the ast2600 SoC. With this patch, the UHCI port
is successfully instantiated on the rainier-bmc and ast2600-evb machines.

Signed-off-by: Guenter Roeck <linux@roeck-us.net>


Reviewed-by: Cédric Le Goater <clg@redhat.com>

Thanks,

C.


---
  hw/arm/aspeed_ast2600.c     | 13 +++++++++++++
  include/hw/arm/aspeed_soc.h |  3 +++
  2 files changed, 16 insertions(+)

diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index be3eb70cdd..cd7e4ae6c9 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -33,6 +33,7 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = {
      [ASPEED_DEV_SPI2]      = 0x1E631000,
      [ASPEED_DEV_EHCI1]     = 0x1E6A1000,
      [ASPEED_DEV_EHCI2]     = 0x1E6A3000,
+    [ASPEED_DEV_UHCI]      = 0x1E6B0000,
      [ASPEED_DEV_MII1]      = 0x1E650000,
      [ASPEED_DEV_MII2]      = 0x1E650008,
      [ASPEED_DEV_MII3]      = 0x1E650010,
@@ -110,6 +111,7 @@ static const int aspeed_soc_ast2600_irqmap[] = {
      [ASPEED_DEV_SDHCI]     = 43,
      [ASPEED_DEV_EHCI1]     = 5,
      [ASPEED_DEV_EHCI2]     = 9,
+    [ASPEED_DEV_UHCI]      = 10,
      [ASPEED_DEV_EMMC]      = 15,
      [ASPEED_DEV_GPIO]      = 40,
      [ASPEED_DEV_GPIO_1_8V] = 11,
@@ -206,6 +208,8 @@ static void aspeed_soc_ast2600_init(Object *obj)
                                  TYPE_PLATFORM_EHCI);
      }
+ object_initialize_child(obj, "uhci", &s->uhci, TYPE_ASPEED_UHCI);
+
      snprintf(typename, sizeof(typename), "aspeed.sdmc-%s", socname);
      object_initialize_child(obj, "sdmc", &s->sdmc, typename);
      object_property_add_alias(obj, "ram-size", OBJECT(&s->sdmc),
@@ -481,6 +485,15 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, 
Error **errp)
                             aspeed_soc_get_irq(s, ASPEED_DEV_EHCI1 + i));
      }
+ /* UHCI */
+    if (!sysbus_realize(SYS_BUS_DEVICE(&s->uhci), errp)) {
+        return;
+    }
+    aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->uhci), 0,
+                    sc->memmap[ASPEED_DEV_UHCI]);
+    sysbus_connect_irq(SYS_BUS_DEVICE(&s->uhci), 0,
+                       aspeed_soc_get_irq(s, ASPEED_DEV_UHCI));
+
      /* SDMC - SDRAM Memory Controller */
      if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdmc), errp)) {
          return;
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index 624d489e0d..b54849db72 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -34,6 +34,7 @@
  #include "hw/gpio/aspeed_gpio.h"
  #include "hw/sd/aspeed_sdhci.h"
  #include "hw/usb/hcd-ehci.h"
+#include "hw/usb/hcd-uhci-sysbus.h"
  #include "qom/object.h"
  #include "hw/misc/aspeed_lpc.h"
  #include "hw/misc/unimp.h"
@@ -72,6 +73,7 @@ struct AspeedSoCState {
      AspeedSMCState fmc;
      AspeedSMCState spi[ASPEED_SPIS_NUM];
      EHCISysBusState ehci[ASPEED_EHCIS_NUM];
+    ASPEEDUHCIState uhci;
      AspeedSBCState sbc;
      AspeedSLIState sli;
      AspeedSLIState sliio;
@@ -193,6 +195,7 @@ enum {
      ASPEED_DEV_SPI2,
      ASPEED_DEV_EHCI1,
      ASPEED_DEV_EHCI2,
+    ASPEED_DEV_UHCI,
      ASPEED_DEV_VIC,
      ASPEED_DEV_INTC,
      ASPEED_DEV_SDMC,




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