Re: [PULL 00/50] riscv-to-apply queue

[Peter Maydell]

On Thu, 31 Oct 2024 at 03:54, Alistair Francis <alistair23@gmail.com> wrote:
>
> The following changes since commit 58d49b5895f2e0b5cfe4b2901bf24f3320b74f29:
>
>   Merge tag 'net-pull-request' of https://github.com/jasowang/qemu into 
> staging (2024-10-29 14:00:43 +0000)
>
> are available in the Git repository at:
>
>   https://github.com/alistair23/qemu.git tags/pull-riscv-to-apply-20241031-1
>
> for you to fetch changes up to c128d39edeff337220fc536a3e935bcba01ecb49:
>
>   target/riscv: Fix vcompress with rvv_ta_all_1s (2024-10-31 13:51:24 +1000)
>
> ----------------------------------------------------------------
> RISC-V PR for 9.2
>
> * Fix an access to VXSAT
> * Expose RV32 cpu to RV64 QEMU
> * Don't clear PLIC pending bits on IRQ lowering
> * Make PLIC zeroth priority register read-only
> * Set vtype.vill on CPU reset
> * Check and update APLIC pending when write sourcecfg
> * Avoid dropping charecters with HTIF
> * Apply FIFO backpressure to guests using SiFive UART
> * Support for control flow integrity extensions
> * Support for the IOMMU with the virt machine
> * set 'aia_mode' to default in error path
> * clarify how 'riscv-aia' default works


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/9.2
for any user-visible changes.

-- PMM