Re: [PATCH v4 14/17] intel_iommu: Set default aw_bits to 48 in scalable modern mode

[Yi Liu]

On 2024/11/4 11:19, Duan, Zhenzhong wrote:
> > -----Original Message-----
> > From: Liu, Yi L <yi.l.liu@intel.com>
> > Sent: Monday, November 4, 2024 11:16 AM
> > Subject: Re: [PATCH v4 14/17] intel_iommu: Set default aw_bits to 48 in scalable
> > modern mode
> >
> > On 2024/9/30 17:26, Zhenzhong Duan wrote:
> > > According to VTD spec, stage-1 page table could support 4-level and
> > > 5-level paging.
> > >
> > > However, 5-level paging translation emulation is unsupported yet.
> > > That means the only supported value for aw_bits is 48.
> > >
> > > So default aw_bits to 48 in scalable modern mode. In other cases,
> > > it is still default to 39 for backward compatibility.
> > >
> > > Add a check to ensure user specified value is 48 in modern mode
> > > for now.
> >
> > this is not a simple check. I think your patch makes an auto selection
> > of aw_bits.
>
> Yes, if user doesn't specify it, will auto select a default.
>
> > > Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
> > > Reviewed-by: Clément Mathieu--Drif<clement.mathieu--drif@eviden.com>
> > > ---
> > >    include/hw/i386/intel_iommu.h |  2 +-
> > >    hw/i386/intel_iommu.c         | 10 +++++++++-
> > >    2 files changed, 10 insertions(+), 2 deletions(-)

Reviewed-by: Yi Liu <yi.l.liu@intel.com>

--
Regards,
Yi Liu