Re: [PATCH v6 14/15] bios-tables-test: Add complex SRAT / HMAT test for GI GP

[Michael S. Tsirkin]

On Mon, Sep 16, 2024 at 06:44:49PM +0100, Jonathan Cameron wrote:
> Add a test with 6 nodes to exercise most interesting corner cases of SRAT
> and HMAT generation including the new Generic Initiator and Generic Port
> Affinity structures.  More details of the set up in the following patch
> adding the table data.
> 
> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>


I could not yet figure out why, but it fails on i686 (32 bit):

https://gitlab.com/mstredhat/qemu/-/jobs/8262608614

any idea?

> ---
>  tests/qtest/bios-tables-test.c | 97 ++++++++++++++++++++++++++++++++++
>  1 file changed, 97 insertions(+)
> 
> diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
> index 36e5c0adde..f568c4a21c 100644
> --- a/tests/qtest/bios-tables-test.c
> +++ b/tests/qtest/bios-tables-test.c
> @@ -1910,6 +1910,101 @@ static void 
> test_acpi_q35_tcg_acpi_hmat_noinitiator(void)
>      free_test_data(&data);
>  }
>  
> +/* Test intended to hit corner cases of SRAT and HMAT */
> +static void test_acpi_q35_tcg_acpi_hmat_generic_x(void)
> +{
> +    test_data data = {};
> +
> +    data.machine = MACHINE_Q35;
> +    data.arch    = "x86";
> +    data.variant = ".acpihmat-generic-x";
> +    test_acpi_one(" -machine hmat=on,cxl=on"
> +                  " -smp 3,sockets=3"
> +                  " -m 128M,maxmem=384M,slots=2"
> +                  " -device pcie-root-port,chassis=1,id=pci.1"
> +                  " -device pci-testdev,bus=pci.1,"
> +                  "multifunction=on,addr=00.0"
> +                  " -device pci-testdev,bus=pci.1,addr=00.1"
> +                  " -device pci-testdev,bus=pci.1,id=gidev,addr=00.2"
> +                  " -device pxb-cxl,bus_nr=64,bus=pcie.0,id=cxl.1"
> +                  " -object memory-backend-ram,size=64M,id=ram0"
> +                  " -object memory-backend-ram,size=64M,id=ram1"
> +                  " -numa node,nodeid=0,cpus=0,memdev=ram0"
> +                  " -numa node,nodeid=1"
> +                  " -object 
> acpi-generic-initiator,id=gi0,pci-dev=gidev,node=1"
> +                  " -numa node,nodeid=2"
> +                  " -object acpi-generic-port,id=gp0,pci-bus=cxl.1,node=2"
> +                  " -numa node,nodeid=3,cpus=1"
> +                  " -numa node,nodeid=4,memdev=ram1"
> +                  " -numa node,nodeid=5,cpus=2"
> +                  " -numa hmat-lb,initiator=0,target=0,hierarchy=memory,"
> +                  "data-type=access-latency,latency=10"
> +                  " -numa hmat-lb,initiator=0,target=0,hierarchy=memory,"
> +                  "data-type=access-bandwidth,bandwidth=800M"
> +                  " -numa hmat-lb,initiator=0,target=2,hierarchy=memory,"
> +                  "data-type=access-latency,latency=100"
> +                  " -numa hmat-lb,initiator=0,target=2,hierarchy=memory,"
> +                  "data-type=access-bandwidth,bandwidth=200M"
> +                  " -numa hmat-lb,initiator=0,target=4,hierarchy=memory,"
> +                  "data-type=access-latency,latency=100"
> +                  " -numa hmat-lb,initiator=0,target=4,hierarchy=memory,"
> +                  "data-type=access-bandwidth,bandwidth=200M"
> +                  " -numa hmat-lb,initiator=0,target=5,hierarchy=memory,"
> +                  "data-type=access-latency,latency=200"
> +                  " -numa hmat-lb,initiator=0,target=5,hierarchy=memory,"
> +                  "data-type=access-bandwidth,bandwidth=400M"
> +                  " -numa hmat-lb,initiator=1,target=0,hierarchy=memory,"
> +                  "data-type=access-latency,latency=500"
> +                  " -numa hmat-lb,initiator=1,target=0,hierarchy=memory,"
> +                  "data-type=access-bandwidth,bandwidth=100M"
> +                  " -numa hmat-lb,initiator=1,target=2,hierarchy=memory,"
> +                  "data-type=access-latency,latency=50"
> +                  " -numa hmat-lb,initiator=1,target=2,hierarchy=memory,"
> +                  "data-type=access-bandwidth,bandwidth=400M"
> +                  " -numa hmat-lb,initiator=1,target=4,hierarchy=memory,"
> +                  "data-type=access-latency,latency=50"
> +                  " -numa hmat-lb,initiator=1,target=4,hierarchy=memory,"
> +                  "data-type=access-bandwidth,bandwidth=800M"
> +                  " -numa hmat-lb,initiator=1,target=5,hierarchy=memory,"
> +                  "data-type=access-latency,latency=500"
> +                  " -numa hmat-lb,initiator=1,target=5,hierarchy=memory,"
> +                  "data-type=access-bandwidth,bandwidth=100M"
> +                  " -numa hmat-lb,initiator=3,target=0,hierarchy=memory,"
> +                  "data-type=access-latency,latency=20"
> +                  " -numa hmat-lb,initiator=3,target=0,hierarchy=memory,"
> +                  "data-type=access-bandwidth,bandwidth=400M"
> +                  " -numa hmat-lb,initiator=3,target=2,hierarchy=memory,"
> +                  "data-type=access-latency,latency=80"
> +                  " -numa hmat-lb,initiator=3,target=2,hierarchy=memory,"
> +                  "data-type=access-bandwidth,bandwidth=200M"
> +                  " -numa hmat-lb,initiator=3,target=4,hierarchy=memory,"
> +                  "data-type=access-latency,latency=80"
> +                  " -numa hmat-lb,initiator=3,target=4,hierarchy=memory,"
> +                  "data-type=access-bandwidth,bandwidth=200M"
> +                  " -numa hmat-lb,initiator=3,target=5,hierarchy=memory,"
> +                  "data-type=access-latency,latency=20"
> +                  " -numa hmat-lb,initiator=3,target=5,hierarchy=memory,"
> +                  "data-type=access-bandwidth,bandwidth=400M"
> +                  " -numa hmat-lb,initiator=5,target=0,hierarchy=memory,"
> +                  "data-type=access-latency,latency=20"
> +                  " -numa hmat-lb,initiator=5,target=0,hierarchy=memory,"
> +                  "data-type=access-bandwidth,bandwidth=400M"
> +                  " -numa hmat-lb,initiator=5,target=2,hierarchy=memory,"
> +                  "data-type=access-latency,latency=80"
> +                  " -numa hmat-lb,initiator=5,target=4,hierarchy=memory,"
> +                  "data-type=access-bandwidth,bandwidth=200M"
> +                  " -numa hmat-lb,initiator=5,target=4,hierarchy=memory,"
> +                  "data-type=access-latency,latency=80"
> +                  " -numa hmat-lb,initiator=5,target=2,hierarchy=memory,"
> +                  "data-type=access-bandwidth,bandwidth=200M"
> +                  " -numa hmat-lb,initiator=5,target=5,hierarchy=memory,"
> +                  "data-type=access-latency,latency=10"
> +                  " -numa hmat-lb,initiator=5,target=5,hierarchy=memory,"
> +                  "data-type=access-bandwidth,bandwidth=800M",
> +                  &data);
> +    free_test_data(&data);
> +}
> +
>  #ifdef CONFIG_POSIX
>  static void test_acpi_erst(const char *machine, const char *arch)
>  {
> @@ -2388,6 +2483,8 @@ int main(int argc, char *argv[])
>              qtest_add_func("acpi/q35/nohpet", test_acpi_q35_tcg_nohpet);
>              qtest_add_func("acpi/q35/acpihmat-noinitiator",
>                             test_acpi_q35_tcg_acpi_hmat_noinitiator);
> +            qtest_add_func("acpi/q35/acpihmat-genericx",
> +                           test_acpi_q35_tcg_acpi_hmat_generic_x);
>  
>              /* i386 does not support memory hotplug */
>              if (strcmp(arch, "i386")) {
> -- 
> 2.43.0