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[PATCH v6 36/60] i386/tdx: Force exposing CPUID 0x1f
From: |
Xiaoyao Li |
Subject: |
[PATCH v6 36/60] i386/tdx: Force exposing CPUID 0x1f |
Date: |
Tue, 5 Nov 2024 01:23:44 -0500 |
TDX uses CPUID 0x1f to configure TD guest's CPU topology. So set
enable_cpuid_0x1f for TDs.
Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
---
target/i386/kvm/tdx.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/target/i386/kvm/tdx.c b/target/i386/kvm/tdx.c
index 289722a129ce..19ce90df4143 100644
--- a/target/i386/kvm/tdx.c
+++ b/target/i386/kvm/tdx.c
@@ -388,7 +388,11 @@ static int tdx_kvm_type(X86ConfidentialGuest *cg)
static void tdx_cpu_instance_init(X86ConfidentialGuest *cg, CPUState *cpu)
{
+ X86CPU *x86cpu = X86_CPU(cpu);
+
object_property_set_bool(OBJECT(cpu), "pmu", false, &error_abort);
+
+ x86cpu->enable_cpuid_0x1f = true;
}
static void tdx_cpu_realizefn(X86ConfidentialGuest *cg, CPUState *cs,
--
2.34.1
- [PATCH v6 31/60] i386/cpu: introduce x86_confidential_guest_cpu_instance_init(), (continued)
- [PATCH v6 39/60] i386/tdx: Disable PIC for TDX VMs, Xiaoyao Li, 2024/11/05
- [PATCH v6 40/60] hw/i386: add eoi_intercept_unsupported member to X86MachineState, Xiaoyao Li, 2024/11/05
- [PATCH v6 35/60] i386/cpu: Introduce enable_cpuid_0x1f to force exposing CPUID 0x1f, Xiaoyao Li, 2024/11/05
- [PATCH v6 36/60] i386/tdx: Force exposing CPUID 0x1f,
Xiaoyao Li <=
- [PATCH v6 43/60] i386/tdx: Only configure MSR_IA32_UCODE_REV in kvm_init_msrs() for TDs, Xiaoyao Li, 2024/11/05
- [PATCH v6 45/60] i386/tdx: Don't get/put guest state for TDX VMs, Xiaoyao Li, 2024/11/05
[PATCH v6 46/60] i386/cgs: Rename *mask_cpuid_features() to *adjust_cpuid_features(), Xiaoyao Li, 2024/11/05
[PATCH v6 42/60] i386/tdx: Don't synchronize guest tsc for TDs, Xiaoyao Li, 2024/11/05
[PATCH v6 44/60] i386/tdx: Skip kvm_put_apicbase() for TDs, Xiaoyao Li, 2024/11/05