Re: [PULL 04/50] target/riscv: Correct SXL return value for RV32 in RV64 QEMU

[Alistair Francis]

On Tue, Nov 5, 2024 at 5:27 PM Michael Tokarev <mjt@tls.msk.ru> wrote:
>
> 31.10.2024 06:52, Alistair Francis wrote:
> > From: TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com>
> ...
> > diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> > index 1619c3acb6..a63a29744c 100644
> > --- a/target/riscv/cpu.h
> > +++ b/target/riscv/cpu.h
> > @@ -709,8 +709,11 @@ static inline RISCVMXL riscv_cpu_sxl(CPURISCVState 
> > *env)
> >   #ifdef CONFIG_USER_ONLY
> >       return env->misa_mxl;
> >   #else
> > -    return get_field(env->mstatus, MSTATUS64_SXL);
> > +    if (env->misa_mxl != MXL_RV32) {
> > +        return get_field(env->mstatus, MSTATUS64_SXL);
> > +    }
> >   #endif
> > +    return MXL_RV32;
> >   }
>
> Shouldn't this last new 'return' be within the #else..#endif block?

It's currently functionally correct, but I see your point.

> The way it is now, the whole thing is quite confusing due to the
> other return in the #ifdef..#else block :)
>
> I'll send a trivial patch "fixing" this confusion if no one objects,
> or anyone else can do that.

No objections here :)

Alistair

>
> Thanks,
>
> /mjt