Re: [PATCH 04/20] hw/net/xilinx_ethlite: Update QOM style

[Edgar E. Iglesias]

On Tue, Nov 12, 2024 at 07:10:28PM +0100, Philippe Mathieu-Daudé wrote:
> Use XlnxXpsEthLite typedef, OBJECT_DECLARE_SIMPLE_TYPE macro;
> convert type_init() to DEFINE_TYPES().
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>


> ---
>  hw/net/xilinx_ethlite.c | 48 +++++++++++++++++++----------------------
>  1 file changed, 22 insertions(+), 26 deletions(-)
> 
> diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c
> index 2b52597f03..0f59811c78 100644
> --- a/hw/net/xilinx_ethlite.c
> +++ b/hw/net/xilinx_ethlite.c
> @@ -53,10 +53,9 @@
>  #define CTRL_S     0x1
>  
>  #define TYPE_XILINX_ETHLITE "xlnx.xps-ethernetlite"
> -DECLARE_INSTANCE_CHECKER(struct xlx_ethlite, XILINX_ETHLITE,
> -                         TYPE_XILINX_ETHLITE)
> +OBJECT_DECLARE_SIMPLE_TYPE(XlnxXpsEthLite, XILINX_ETHLITE)
>  
> -struct xlx_ethlite
> +struct XlnxXpsEthLite
>  {
>      SysBusDevice parent_obj;
>  
> @@ -73,7 +72,7 @@ struct xlx_ethlite
>      uint32_t regs[R_MAX];
>  };
>  
> -static inline void eth_pulse_irq(struct xlx_ethlite *s)
> +static inline void eth_pulse_irq(XlnxXpsEthLite *s)
>  {
>      /* Only the first gie reg is active.  */
>      if (s->regs[R_TX_GIE0] & GIE_GIE) {
> @@ -84,7 +83,7 @@ static inline void eth_pulse_irq(struct xlx_ethlite *s)
>  static uint64_t
>  eth_read(void *opaque, hwaddr addr, unsigned int size)
>  {
> -    struct xlx_ethlite *s = opaque;
> +    XlnxXpsEthLite *s = opaque;
>      uint32_t r = 0;
>  
>      addr >>= 2;
> @@ -112,7 +111,7 @@ static void
>  eth_write(void *opaque, hwaddr addr,
>            uint64_t val64, unsigned int size)
>  {
> -    struct xlx_ethlite *s = opaque;
> +    XlnxXpsEthLite *s = opaque;
>      unsigned int base = 0;
>      uint32_t value = val64;
>  
> @@ -176,7 +175,7 @@ static const MemoryRegionOps eth_ops = {
>  
>  static bool eth_can_rx(NetClientState *nc)
>  {
> -    struct xlx_ethlite *s = qemu_get_nic_opaque(nc);
> +    XlnxXpsEthLite *s = qemu_get_nic_opaque(nc);
>      unsigned int rxbase = s->rxbuf * (0x800 / 4);
>  
>      return !(s->regs[rxbase + R_RX_CTRL0] & CTRL_S);
> @@ -184,7 +183,7 @@ static bool eth_can_rx(NetClientState *nc)
>  
>  static ssize_t eth_rx(NetClientState *nc, const uint8_t *buf, size_t size)
>  {
> -    struct xlx_ethlite *s = qemu_get_nic_opaque(nc);
> +    XlnxXpsEthLite *s = qemu_get_nic_opaque(nc);
>      unsigned int rxbase = s->rxbuf * (0x800 / 4);
>  
>      /* DA filter.  */
> @@ -214,7 +213,7 @@ static ssize_t eth_rx(NetClientState *nc, const uint8_t 
> *buf, size_t size)
>  
>  static void xilinx_ethlite_reset(DeviceState *dev)
>  {
> -    struct xlx_ethlite *s = XILINX_ETHLITE(dev);
> +    XlnxXpsEthLite *s = XILINX_ETHLITE(dev);
>  
>      s->rxbuf = 0;
>  }
> @@ -228,7 +227,7 @@ static NetClientInfo net_xilinx_ethlite_info = {
>  
>  static void xilinx_ethlite_realize(DeviceState *dev, Error **errp)
>  {
> -    struct xlx_ethlite *s = XILINX_ETHLITE(dev);
> +    XlnxXpsEthLite *s = XILINX_ETHLITE(dev);
>  
>      qemu_macaddr_default_if_unset(&s->conf.macaddr);
>      s->nic = qemu_new_nic(&net_xilinx_ethlite_info, &s->conf,
> @@ -239,7 +238,7 @@ static void xilinx_ethlite_realize(DeviceState *dev, 
> Error **errp)
>  
>  static void xilinx_ethlite_init(Object *obj)
>  {
> -    struct xlx_ethlite *s = XILINX_ETHLITE(obj);
> +    XlnxXpsEthLite *s = XILINX_ETHLITE(obj);
>  
>      sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq);
>  
> @@ -249,9 +248,9 @@ static void xilinx_ethlite_init(Object *obj)
>  }
>  
>  static Property xilinx_ethlite_properties[] = {
> -    DEFINE_PROP_UINT32("tx-ping-pong", struct xlx_ethlite, c_tx_pingpong, 1),
> -    DEFINE_PROP_UINT32("rx-ping-pong", struct xlx_ethlite, c_rx_pingpong, 1),
> -    DEFINE_NIC_PROPERTIES(struct xlx_ethlite, conf),
> +    DEFINE_PROP_UINT32("tx-ping-pong", XlnxXpsEthLite, c_tx_pingpong, 1),
> +    DEFINE_PROP_UINT32("rx-ping-pong", XlnxXpsEthLite, c_rx_pingpong, 1),
> +    DEFINE_NIC_PROPERTIES(XlnxXpsEthLite, conf),
>      DEFINE_PROP_END_OF_LIST(),
>  };
>  
> @@ -264,17 +263,14 @@ static void xilinx_ethlite_class_init(ObjectClass 
> *klass, void *data)
>      device_class_set_props(dc, xilinx_ethlite_properties);
>  }
>  
> -static const TypeInfo xilinx_ethlite_info = {
> -    .name          = TYPE_XILINX_ETHLITE,
> -    .parent        = TYPE_SYS_BUS_DEVICE,
> -    .instance_size = sizeof(struct xlx_ethlite),
> -    .instance_init = xilinx_ethlite_init,
> -    .class_init    = xilinx_ethlite_class_init,
> +static const TypeInfo xilinx_ethlite_types[] = {
> +    {
> +        .name          = TYPE_XILINX_ETHLITE,
> +        .parent        = TYPE_SYS_BUS_DEVICE,
> +        .instance_size = sizeof(XlnxXpsEthLite),
> +        .instance_init = xilinx_ethlite_init,
> +        .class_init    = xilinx_ethlite_class_init,
> +    },
>  };
>  
> -static void xilinx_ethlite_register_types(void)
> -{
> -    type_register_static(&xilinx_ethlite_info);
> -}
> -
> -type_init(xilinx_ethlite_register_types)
> +DEFINE_TYPES(xilinx_ethlite_types)
> -- 
> 2.45.2
>