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[PATCH v2 23/54] accel/tcg: Check original prot bits for read in atomic_
From: |
Richard Henderson |
Subject: |
[PATCH v2 23/54] accel/tcg: Check original prot bits for read in atomic_mmu_lookup |
Date: |
Thu, 14 Nov 2024 08:00:59 -0800 |
In the mist before CPUTLBEntryFull existed, we had to be
clever to detect write-only pages. Now we can directly
test the saved prot bits, which is clearer.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/cputlb.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index c975dd2322..ae3a99eb47 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -1854,14 +1854,13 @@ static void *atomic_mmu_lookup(CPUState *cpu, vaddr
addr, MemOpIdx oi,
flags &= ~TLB_INVALID_MASK;
}
}
+ full = &cpu->neg.tlb.d[mmu_idx].fulltlb[index];
/*
* Let the guest notice RMW on a write-only page.
* We have just verified that the page is writable.
- * Subpage lookups may have left TLB_INVALID_MASK set,
- * but addr_read will only be -1 if PAGE_READ was unset.
*/
- if (unlikely(tlbe->addr_read == -1)) {
+ if (unlikely(!(full->prot & PAGE_READ))) {
tlb_fill_align(cpu, addr, MMU_DATA_LOAD, mmu_idx,
0, size, false, retaddr);
/*
@@ -1899,7 +1898,6 @@ static void *atomic_mmu_lookup(CPUState *cpu, vaddr addr,
MemOpIdx oi,
}
hostaddr = (void *)((uintptr_t)addr + tlbe->addend);
- full = &cpu->neg.tlb.d[mmu_idx].fulltlb[index];
if (unlikely(flags & TLB_NOTDIRTY)) {
notdirty_write(cpu, addr, size, full, retaddr);
--
2.43.0
- [PATCH v2 13/54] accel/tcg: Process IntervalTree entries in tlb_reset_dirty, (continued)
- [PATCH v2 13/54] accel/tcg: Process IntervalTree entries in tlb_reset_dirty, Richard Henderson, 2024/11/14
- [PATCH v2 24/54] accel/tcg: Preserve tlb flags in tlb_set_compare, Richard Henderson, 2024/11/14
- [PATCH v2 25/54] accel/tcg: Return CPUTLBEntryFull not pointer in probe_access_full_mmu, Richard Henderson, 2024/11/14
- [PATCH v2 35/54] target/avr: Convert to TCGCPUOps.tlb_fill_align, Richard Henderson, 2024/11/14
- [PATCH v2 16/54] accel/tcg: Pass full addr to victim_tlb_hit, Richard Henderson, 2024/11/14
- [PATCH v2 23/54] accel/tcg: Check original prot bits for read in atomic_mmu_lookup,
Richard Henderson <=
- [PATCH v2 26/54] accel/tcg: Return CPUTLBEntryFull not pointer in probe_access_full, Richard Henderson, 2024/11/14
- [PATCH v2 21/54] accel/tcg: Delay plugin adjustment in probe_access_internal, Richard Henderson, 2024/11/14
- [PATCH v2 38/54] target/m68k: Convert to TCGCPUOps.tlb_fill_align, Richard Henderson, 2024/11/14
- [PATCH v2 39/54] target/m68k: Do not call tlb_set_page in helper_ptest, Richard Henderson, 2024/11/14
- [PATCH v2 19/54] accel/tcg: Remove tlb_n_used_entries_inc, Richard Henderson, 2024/11/14