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[PATCH v2 43/54] target/ppc: Convert to TCGCPUOps.tlb_fill_align
From: |
Richard Henderson |
Subject: |
[PATCH v2 43/54] target/ppc: Convert to TCGCPUOps.tlb_fill_align |
Date: |
Thu, 14 Nov 2024 08:01:19 -0800 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/ppc/internal.h | 7 ++++---
target/ppc/cpu_init.c | 2 +-
target/ppc/mmu_helper.c | 21 ++++++++++++++++-----
3 files changed, 21 insertions(+), 9 deletions(-)
diff --git a/target/ppc/internal.h b/target/ppc/internal.h
index 20fb2ec593..9d132d35a1 100644
--- a/target/ppc/internal.h
+++ b/target/ppc/internal.h
@@ -273,9 +273,10 @@ void ppc_cpu_record_sigsegv(CPUState *cs, vaddr addr,
MMUAccessType access_type,
bool maperr, uintptr_t ra);
#else
-bool ppc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
- MMUAccessType access_type, int mmu_idx,
- bool probe, uintptr_t retaddr);
+bool ppc_cpu_tlb_fill_align(CPUState *cs, CPUTLBEntryFull *out,
+ vaddr addr, MMUAccessType access_type,
+ int mmu_idx, MemOp memop, int size,
+ bool probe, uintptr_t ra);
G_NORETURN void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
MMUAccessType access_type, int
mmu_idx,
uintptr_t retaddr);
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index efcb80d1c2..387c7ff2da 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -7422,7 +7422,7 @@ static const TCGCPUOps ppc_tcg_ops = {
#ifdef CONFIG_USER_ONLY
.record_sigsegv = ppc_cpu_record_sigsegv,
#else
- .tlb_fill = ppc_cpu_tlb_fill,
+ .tlb_fill_align = ppc_cpu_tlb_fill_align,
.cpu_exec_interrupt = ppc_cpu_exec_interrupt,
.cpu_exec_halt = ppc_cpu_has_work,
.do_interrupt = ppc_cpu_do_interrupt,
diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c
index b167b37e0a..bf98e0efb0 100644
--- a/target/ppc/mmu_helper.c
+++ b/target/ppc/mmu_helper.c
@@ -1357,18 +1357,29 @@ void helper_check_tlb_flush_global(CPUPPCState *env)
}
-bool ppc_cpu_tlb_fill(CPUState *cs, vaddr eaddr, int size,
- MMUAccessType access_type, int mmu_idx,
- bool probe, uintptr_t retaddr)
+bool ppc_cpu_tlb_fill_align(CPUState *cs, CPUTLBEntryFull *out,
+ vaddr eaddr, MMUAccessType access_type,
+ int mmu_idx, MemOp memop, int size,
+ bool probe, uintptr_t retaddr)
{
PowerPCCPU *cpu = POWERPC_CPU(cs);
hwaddr raddr;
int page_size, prot;
+ if (eaddr & ((1 << memop_alignment_bits(memop)) - 1)) {
+ if (probe) {
+ return false;
+ }
+ ppc_cpu_do_unaligned_access(cs, eaddr, access_type, mmu_idx, retaddr);
+ }
+
if (ppc_xlate(cpu, eaddr, access_type, &raddr,
&page_size, &prot, mmu_idx, !probe)) {
- tlb_set_page(cs, eaddr & TARGET_PAGE_MASK, raddr & TARGET_PAGE_MASK,
- prot, mmu_idx, 1UL << page_size);
+ memset(out, 0, sizeof(*out));
+ out->phys_addr = raddr;
+ out->prot = prot;
+ out->lg_page_size = page_size;
+ out->attrs = MEMTXATTRS_UNSPECIFIED;
return true;
}
if (probe) {
--
2.43.0
- [PATCH v2 30/54] accel/tcg: Merge mmu_lookup1 into mmu_lookup, (continued)
- [PATCH v2 30/54] accel/tcg: Merge mmu_lookup1 into mmu_lookup, Richard Henderson, 2024/11/14
- [PATCH v2 31/54] accel/tcg: Always use IntervalTree for code lookups, Richard Henderson, 2024/11/14
- [PATCH v2 46/54] target/s390x: Convert to TCGCPUOps.tlb_fill_align, Richard Henderson, 2024/11/14
- [PATCH v2 44/54] target/riscv: Convert to TCGCPUOps.tlb_fill_align, Richard Henderson, 2024/11/14
- [PATCH v2 40/54] target/microblaze: Convert to TCGCPUOps.tlb_fill_align, Richard Henderson, 2024/11/14
- [PATCH v2 43/54] target/ppc: Convert to TCGCPUOps.tlb_fill_align,
Richard Henderson <=
- [PATCH v2 41/54] target/mips: Convert to TCGCPUOps.tlb_fill_align, Richard Henderson, 2024/11/14
- [PATCH v2 45/54] target/rx: Convert to TCGCPUOps.tlb_fill_align, Richard Henderson, 2024/11/14
- [PATCH v2 48/54] target/sparc: Convert to TCGCPUOps.tlb_fill_align, Richard Henderson, 2024/11/14
- [PATCH v2 50/54] target/xtensa: Convert to TCGCPUOps.tlb_fill_align, Richard Henderson, 2024/11/14