Re: [PATCH v2 37/54] target/loongarch: Convert to TCGCPUOps.tlb_fill_align

[Pierrick Bouvier]

On 11/14/24 08:01, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   target/loongarch/internals.h      |  7 ++++---
>   target/loongarch/cpu.c            |  2 +-
>   target/loongarch/tcg/tlb_helper.c | 17 +++++++++++------
>   3 files changed, 16 insertions(+), 10 deletions(-)
>
> diff --git a/target/loongarch/internals.h b/target/loongarch/internals.h
> index 1a02427627..a9f73f27b2 100644
> --- a/target/loongarch/internals.h
> +++ b/target/loongarch/internals.h
> @@ -60,9 +60,10 @@ int get_physical_address(CPULoongArchState *env, hwaddr 
> *physical,
>   hwaddr loongarch_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
>   
>   #ifdef CONFIG_TCG
> -bool loongarch_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
> -                            MMUAccessType access_type, int mmu_idx,
> -                            bool probe, uintptr_t retaddr);
> +bool loongarch_cpu_tlb_fill_align(CPUState *cs, CPUTLBEntryFull *out,
> +                                  vaddr addr, MMUAccessType access_type,
> +                                  int mmu_idx, MemOp memop, int size,
> +                                  bool probe, uintptr_t ra);
>   #endif
>   #endif /* !CONFIG_USER_ONLY */
>   
> diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
> index 57cc4f314b..47d69f1788 100644
> --- a/target/loongarch/cpu.c
> +++ b/target/loongarch/cpu.c
> @@ -798,7 +798,7 @@ static const TCGCPUOps loongarch_tcg_ops = {
>       .restore_state_to_opc = loongarch_restore_state_to_opc,
>   
>   #ifndef CONFIG_USER_ONLY
> -    .tlb_fill = loongarch_cpu_tlb_fill,
> +    .tlb_fill_align = loongarch_cpu_tlb_fill_align,
>       .cpu_exec_interrupt = loongarch_cpu_exec_interrupt,
>       .cpu_exec_halt = loongarch_cpu_has_work,
>       .do_interrupt = loongarch_cpu_do_interrupt,
> diff --git a/target/loongarch/tcg/tlb_helper.c 
> b/target/loongarch/tcg/tlb_helper.c
> index 97f38fc391..94d5df08a4 100644
> --- a/target/loongarch/tcg/tlb_helper.c
> +++ b/target/loongarch/tcg/tlb_helper.c
> @@ -474,9 +474,10 @@ void helper_invtlb_page_asid_or_g(CPULoongArchState *env,
>       tlb_flush(env_cpu(env));
>   }
>   
> -bool loongarch_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
> -                            MMUAccessType access_type, int mmu_idx,
> -                            bool probe, uintptr_t retaddr)
> +bool loongarch_cpu_tlb_fill_align(CPUState *cs, CPUTLBEntryFull *out,
> +                                  vaddr address, MMUAccessType access_type,
> +                                  int mmu_idx, MemOp memop, int size,
> +                                  bool probe, uintptr_t retaddr)
>   {
>       CPULoongArchState *env = cpu_env(cs);
>       hwaddr physical;
> @@ -488,12 +489,16 @@ bool loongarch_cpu_tlb_fill(CPUState *cs, vaddr address, 
> int size,
>                                  access_type, mmu_idx);
>   
>       if (ret == TLBRET_MATCH) {
> -        tlb_set_page(cs, address & TARGET_PAGE_MASK,
> -                     physical & TARGET_PAGE_MASK, prot,
> -                     mmu_idx, TARGET_PAGE_SIZE);
>           qemu_log_mask(CPU_LOG_MMU,
>                         "%s address=%" VADDR_PRIx " physical " HWADDR_FMT_plx
>                         " prot %d\n", __func__, address, physical, prot);
> +
> +        memset(out, 0, sizeof(*out));
> +        out->phys_addr = physical;
> +        out->prot = prot;
> +        out->attrs = MEMTXATTRS_UNSPECIFIED;
> +        out->lg_page_size = TARGET_PAGE_BITS;
> +
>           return true;
>       } else {
>           qemu_log_mask(CPU_LOG_MMU,

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>