Introduce the MIPS16e decodetree configs for the 16-bit
and 32-bit instructions.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/mips/tcg/translate.h | 2 ++
target/mips/tcg/mips16e_16.decode | 9 +++++++++
target/mips/tcg/mips16e_32.decode | 9 +++++++++
target/mips/tcg/mips16e_translate.c | 14 ++++++++++++++
target/mips/tcg/mips16e_translate.c.inc | 8 ++++++++
target/mips/tcg/meson.build | 3 +++
6 files changed, 45 insertions(+)
create mode 100644 target/mips/tcg/mips16e_16.decode
create mode 100644 target/mips/tcg/mips16e_32.decode
create mode 100644 target/mips/tcg/mips16e_translate.c
diff --git a/target/mips/tcg/translate.h b/target/mips/tcg/translate.h
index a65ab4a747c..d1aa811cfa1 100644
--- a/target/mips/tcg/translate.h
+++ b/target/mips/tcg/translate.h
@@ -223,6 +223,8 @@ bool decode_64bit_enabled(DisasContext *ctx);
/* decodetree generated */
bool decode_isa_rel6(DisasContext *ctx, uint32_t insn);
+bool decode_ase_mips16e_16(DisasContext *ctx, uint16_t insn);
+bool decode_ase_mips16e_32(DisasContext *ctx, uint32_t insn);
bool decode_ase_msa(DisasContext *ctx, uint32_t insn);
bool decode_ext_txx9(DisasContext *ctx, uint32_t insn);
bool decode_ext_loongson(DisasContext *ctx, uint32_t insn);
diff --git a/target/mips/tcg/mips16e_16.decode
b/target/mips/tcg/mips16e_16.decode
new file mode 100644
index 00000000000..82586493f68
--- /dev/null
+++ b/target/mips/tcg/mips16e_16.decode
@@ -0,0 +1,9 @@
+# MIPS16e 16-bit instruction set extensions
+#
+# Copyright (C) 2021 Philippe Mathieu-Daudé
+#
+# SPDX-License-Identifier: LGPL-2.1-or-later
+#
+# Reference: MIPS Architecture for Programmers, Volume IV-a
+# The MIPS16e Application Specific Extension
+# (Document Number: MD00076)
diff --git a/target/mips/tcg/mips16e_32.decode
b/target/mips/tcg/mips16e_32.decode
new file mode 100644
index 00000000000..fc429049e18
--- /dev/null
+++ b/target/mips/tcg/mips16e_32.decode
@@ -0,0 +1,9 @@
+# MIPS16e 32-bit instruction set extensions
+#
+# Copyright (C) 2021 Philippe Mathieu-Daudé
+#
+# SPDX-License-Identifier: LGPL-2.1-or-later
+#
+# Reference: MIPS Architecture for Programmers, Volume IV-a
+# The MIPS16e Application Specific Extension
+# (Document Number: MD00076)
diff --git a/target/mips/tcg/mips16e_translate.c
b/target/mips/tcg/mips16e_translate.c
new file mode 100644
index 00000000000..6de9928b37e
--- /dev/null
+++ b/target/mips/tcg/mips16e_translate.c
@@ -0,0 +1,14 @@
+/*
+ * MIPS emulation for QEMU - MIPS16e translation routines
+ *
+ * Copyright (c) 2021 Philippe Mathieu-Daudé <f4bug@amsat.org>
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "translate.h"
+
+/* Include the auto-generated decoders. */
+#include "decode-mips16e_16.c.inc"
+#include "decode-mips16e_32.c.inc"
diff --git a/target/mips/tcg/mips16e_translate.c.inc
b/target/mips/tcg/mips16e_translate.c.inc
index defef3ce559..a57ae4e95b1 100644
--- a/target/mips/tcg/mips16e_translate.c.inc
+++ b/target/mips/tcg/mips16e_translate.c.inc
@@ -657,6 +657,14 @@ static int decode_ase_mips16e(CPUMIPSState *env,
DisasContext *ctx)
int n_bytes;
ctx->opcode = translator_lduw(env, &ctx->base, ctx->base.pc_next);
+
+ if (decode_ase_mips16e_16(ctx, ctx->opcode)) {
+ return 2;
+ }
+ if (decode_ase_mips16e_32(ctx, ctx->opcode)) {
+ return 4;
+ }