Re: [PATCH v3 0/3] Introduce a new Write Protected pin inverted property

[Cédric Le Goater]

> Having to modify sdhci.c internals is dubious, since inversion
> occurs out of this block. If this is the soc/board layer, isn't
> better to model at this level? Smth like:
>
> -- >8 --
> diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
> index be3eb70cdd7..aad9be66b75 100644
> --- a/hw/arm/aspeed_ast2600.c
> +++ b/hw/arm/aspeed_ast2600.c
> @@ -559,8 +559,9 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, 
> Error **errp)
>       }
>       aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sdhci), 0,
>                       sc->memmap[ASPEED_DEV_SDHCI]);
> +    irq = aspeed_soc_get_irq(s, ASPEED_DEV_SDHCI);
>       sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0,
> -                       aspeed_soc_get_irq(s, ASPEED_DEV_SDHCI));
> +                       sc->sdhci_wp_inverted ? qemu_irq_invert(irq) : irq);
>
>       /* eMMC */
>       if (!sysbus_realize(SYS_BUS_DEVICE(&s->emmc), errp)) {
> ---

Nice ! I didn't know about qemu_irq_invert().

Jamin, could you please give it a try and respin ?

Thanks,

C.