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[PATCH v3 11/28] hw/misc/aspeed_hace: Support accumulative mode for dire
From: |
Jamin Lin |
Subject: |
[PATCH v3 11/28] hw/misc/aspeed_hace: Support accumulative mode for direct access mode |
Date: |
Thu, 15 May 2025 16:09:43 +0800 |
Enable accumulative mode for direct access mode operations. In direct access
mode, only a single source buffer is used, so the "iovec" count is set to 1.
If "acc_mode" is enabled:
1. Accumulate "total_req_len" with the current request length ("plen").
2. Check for padding and determine whether this is the final request.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/misc/aspeed_hace.c | 24 +++++++++++++++++++++---
1 file changed, 21 insertions(+), 3 deletions(-)
diff --git a/hw/misc/aspeed_hace.c b/hw/misc/aspeed_hace.c
index 62649b5b27..049f732f99 100644
--- a/hw/misc/aspeed_hace.c
+++ b/hw/misc/aspeed_hace.c
@@ -151,8 +151,11 @@ static uint64_t hash_get_source_addr(AspeedHACEState *s)
return src_addr;
}
-static int hash_prepare_direct_iov(AspeedHACEState *s, struct iovec *iov)
+static int hash_prepare_direct_iov(AspeedHACEState *s, struct iovec *iov,
+ bool acc_mode, bool *acc_final_request)
{
+ uint32_t total_msg_len;
+ uint32_t pad_offset;
uint64_t src;
void *haddr;
hwaddr plen;
@@ -171,9 +174,23 @@ static int hash_prepare_direct_iov(AspeedHACEState *s,
struct iovec *iov)
}
iov[0].iov_base = haddr;
- iov[0].iov_len = plen;
iov_idx = 1;
+ if (acc_mode) {
+ s->total_req_len += plen;
+
+ if (has_padding(s, &iov[0], plen, &total_msg_len,
+ &pad_offset)) {
+ /* Padding being present indicates the final request */
+ *acc_final_request = true;
+ iov[0].iov_len = pad_offset;
+ } else {
+ iov[0].iov_len = plen;
+ }
+ } else {
+ iov[0].iov_len = plen;
+ }
+
return iov_idx;
}
@@ -345,7 +362,8 @@ static void do_hash_operation(AspeedHACEState *s, int algo,
bool sg_mode,
if (sg_mode) {
iov_idx = hash_prepare_sg_iov(s, iov, acc_mode, &acc_final_request);
} else {
- iov_idx = hash_prepare_direct_iov(s, iov);
+ iov_idx = hash_prepare_direct_iov(s, iov, acc_mode,
+ &acc_final_request);
}
if (iov_idx <= 0) {
--
2.43.0
- [PATCH v3 01/28] hw/misc/aspeed_hace: Remove unused code for better readability, (continued)
- [PATCH v3 01/28] hw/misc/aspeed_hace: Remove unused code for better readability, Jamin Lin, 2025/05/15
- [PATCH v3 03/28] hw/misc/aspeed_hace: Ensure HASH_IRQ is always set to prevent firmware hang, Jamin Lin, 2025/05/15
- [PATCH v3 07/28] hw/misc/aspeed_hace: Extract non-accumulation hash execution into helper function, Jamin Lin, 2025/05/15
- [PATCH v3 05/28] hw/misc/aspeed_hace: Extract SG-mode hash buffer setup into helper function, Jamin Lin, 2025/05/15
- [PATCH v3 02/28] hw/misc/aspeed_hace: Improve readability and consistency in variable naming, Jamin Lin, 2025/05/15
- [PATCH v3 04/28] hw/misc/aspeed_hace: Extract direct mode hash buffer setup into helper function, Jamin Lin, 2025/05/15
- [PATCH v3 06/28] hw/misc/aspeed_hace: Extract digest write and iov unmap into helper function, Jamin Lin, 2025/05/15
- [PATCH v3 08/28] hw/misc/aspeed_hace: Extract accumulation-mode hash execution into helper function, Jamin Lin, 2025/05/15
- [PATCH v3 10/28] hw/misc/aspeed_hace: Rename R_HASH_DEST to R_HASH_DIGEST and introduce 64-bit hash digest address helper, Jamin Lin, 2025/05/15
- [PATCH v3 09/28] hw/misc/aspeed_hace: Introduce 64-bit hash source address helper function, Jamin Lin, 2025/05/15
- [PATCH v3 11/28] hw/misc/aspeed_hace: Support accumulative mode for direct access mode,
Jamin Lin <=
- [PATCH v3 13/28] hw/misc/aspeed_hace: Add support for source, digest, key buffer 64 bit addresses, Jamin Lin, 2025/05/15
- [PATCH v3 17/28] tests/qtest: Reorder aspeed test list, Jamin Lin, 2025/05/15
- [PATCH v3 18/28] test/qtest: Introduce a new aspeed-hace-utils.c to place common testcases, Jamin Lin, 2025/05/15
- [PATCH v3 12/28] hw/misc/aspeed_hace: Move register size to instance class and dynamically allocate regs, Jamin Lin, 2025/05/15
- [PATCH v3 15/28] hw/misc/aspeed_hace: Add trace-events for better debugging, Jamin Lin, 2025/05/15
- [PATCH v3 16/28] hw/misc/aspeed_hace: Support to dump plaintext and digest for better debugging, Jamin Lin, 2025/05/15
- [PATCH v3 19/28] test/qtest/hace: Specify explicit array sizes for test vectors and hash results, Jamin Lin, 2025/05/15
- [PATCH v3 20/28] test/qtest/hace: Adjust test address range for AST1030 due to SRAM limitations, Jamin Lin, 2025/05/15
- [PATCH v3 14/28] hw/misc/aspeed_hace: Support DMA 64 bits dram address, Jamin Lin, 2025/05/15
- [PATCH v3 21/28] test/qtest/hace: Add SHA-384 test cases for ASPEED HACE model, Jamin Lin, 2025/05/15