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Re: [PATCH 21/50] ppc/xive2: add interrupt priority configuration flags
From: |
Nicholas Piggin |
Subject: |
Re: [PATCH 21/50] ppc/xive2: add interrupt priority configuration flags |
Date: |
Fri, 16 May 2025 10:18:29 +1000 |
On Mon May 12, 2025 at 1:10 PM AEST, Nicholas Piggin wrote:
> From: Glenn Miles <milesg@linux.ibm.com>
>
> Adds support for extracting additional configuration flags from
> the XIVE configuration register that are needed for redistribution
> of group interrupts.
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
>
> Signed-off-by: Glenn Miles <milesg@linux.ibm.com>
> ---
> hw/intc/pnv_xive2.c | 16 ++++++++++++----
> hw/intc/pnv_xive2_regs.h | 1 +
> include/hw/ppc/xive2.h | 8 +++++---
> 3 files changed, 18 insertions(+), 7 deletions(-)
>
> diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
> index c9374f0eee..96b8851b7e 100644
> --- a/hw/intc/pnv_xive2.c
> +++ b/hw/intc/pnv_xive2.c
> @@ -605,20 +605,28 @@ static uint32_t pnv_xive2_get_config(Xive2Router *xrtr)
> {
> PnvXive2 *xive = PNV_XIVE2(xrtr);
> uint32_t cfg = 0;
> + uint64_t reg = xive->cq_regs[CQ_XIVE_CFG >> 3];
>
> - if (xive->cq_regs[CQ_XIVE_CFG >> 3] & CQ_XIVE_CFG_GEN1_TIMA_OS) {
> + if (reg & CQ_XIVE_CFG_GEN1_TIMA_OS) {
> cfg |= XIVE2_GEN1_TIMA_OS;
> }
>
> - if (xive->cq_regs[CQ_XIVE_CFG >> 3] & CQ_XIVE_CFG_EN_VP_SAVE_RESTORE) {
> + if (reg & CQ_XIVE_CFG_EN_VP_SAVE_RESTORE) {
> cfg |= XIVE2_VP_SAVE_RESTORE;
> }
>
> - if (GETFIELD(CQ_XIVE_CFG_HYP_HARD_RANGE,
> - xive->cq_regs[CQ_XIVE_CFG >> 3]) ==
> CQ_XIVE_CFG_THREADID_8BITS) {
> + if (GETFIELD(CQ_XIVE_CFG_HYP_HARD_RANGE, reg) ==
> + CQ_XIVE_CFG_THREADID_8BITS) {
> cfg |= XIVE2_THREADID_8BITS;
> }
>
> + if (reg & CQ_XIVE_CFG_EN_VP_GRP_PRIORITY) {
> + cfg |= XIVE2_EN_VP_GRP_PRIORITY;
> + }
> +
> + cfg = SETFIELD(XIVE2_VP_INT_PRIO, cfg,
> + GETFIELD(CQ_XIVE_CFG_VP_INT_PRIO, reg));
> +
> return cfg;
> }
>
> diff --git a/hw/intc/pnv_xive2_regs.h b/hw/intc/pnv_xive2_regs.h
> index e8b87b3d2c..d53300f709 100644
> --- a/hw/intc/pnv_xive2_regs.h
> +++ b/hw/intc/pnv_xive2_regs.h
> @@ -66,6 +66,7 @@
> #define CQ_XIVE_CFG_GEN1_TIMA_HYP_BLK0 PPC_BIT(26) /* 0 if
> bit[25]=0 */
> #define CQ_XIVE_CFG_GEN1_TIMA_CROWD_DIS PPC_BIT(27) /* 0 if
> bit[25]=0 */
> #define CQ_XIVE_CFG_GEN1_END_ESX PPC_BIT(28)
> +#define CQ_XIVE_CFG_EN_VP_GRP_PRIORITY PPC_BIT(32) /* 0 if
> bit[25]=1 */
> #define CQ_XIVE_CFG_EN_VP_SAVE_RESTORE PPC_BIT(38) /* 0 if
> bit[25]=1 */
> #define CQ_XIVE_CFG_EN_VP_SAVE_REST_STRICT PPC_BIT(39) /* 0 if
> bit[25]=1 */
>
> diff --git a/include/hw/ppc/xive2.h b/include/hw/ppc/xive2.h
> index 2436ddb5e5..760b94a962 100644
> --- a/include/hw/ppc/xive2.h
> +++ b/include/hw/ppc/xive2.h
> @@ -29,9 +29,11 @@ OBJECT_DECLARE_TYPE(Xive2Router, Xive2RouterClass,
> XIVE2_ROUTER);
> * Configuration flags
> */
>
> -#define XIVE2_GEN1_TIMA_OS 0x00000001
> -#define XIVE2_VP_SAVE_RESTORE 0x00000002
> -#define XIVE2_THREADID_8BITS 0x00000004
> +#define XIVE2_GEN1_TIMA_OS 0x00000001
> +#define XIVE2_VP_SAVE_RESTORE 0x00000002
> +#define XIVE2_THREADID_8BITS 0x00000004
> +#define XIVE2_EN_VP_GRP_PRIORITY 0x00000008
> +#define XIVE2_VP_INT_PRIO 0x00000030
>
> typedef struct Xive2RouterClass {
> SysBusDeviceClass parent;
- Re: [PATCH 16/50] ppc/xive: Fix pulling pool and phys contexts, (continued)
- [PATCH 18/50] pnv/xive2: Print value in invalid register write logging, Nicholas Piggin, 2025/05/11
- [PATCH 21/50] ppc/xive2: add interrupt priority configuration flags, Nicholas Piggin, 2025/05/11
- [PATCH 23/50] ppc/xive: Add more interrupt notification tracing, Nicholas Piggin, 2025/05/11
- [PATCH 22/50] ppc/xive2: Support redistribution of group interrupts, Nicholas Piggin, 2025/05/11
- [PATCH 24/50] ppc/xive2: Improve pool regs variable name, Nicholas Piggin, 2025/05/11
- [PATCH 25/50] ppc/xive2: Implement "Ack OS IRQ to even report line" TIMA op, Nicholas Piggin, 2025/05/11