[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-ppc] [Qemu-devel] [PATCH qom-cpu for-next 1/2] cpu: Use QTAILQ
From: |
Andreas Färber |
Subject: |
Re: [Qemu-ppc] [Qemu-devel] [PATCH qom-cpu for-next 1/2] cpu: Use QTAILQ for CPU list |
Date: |
Wed, 21 Aug 2013 16:12:13 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130801 Thunderbird/17.0.8 |
Am 30.07.2013 18:55, schrieb Andreas Färber:
> Introduce CPU_FOREACH(), CPU_FOREACH_SAFE() and CPU_NEXT() shorthand
> macros.
>
> Signed-off-by: Andreas Färber <address@hidden>
Needs the following addition now:
diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c
index af182da..9d0e27e 100644
--- a/hw/cpu/a15mpcore.c
+++ b/hw/cpu/a15mpcore.c
@@ -72,9 +72,15 @@ static int a15mp_priv_init(SysBusDevice *dev)
/* Wire the outputs from each CPU's generic timer to the
* appropriate GIC PPI inputs
*/
- for (i = 0, cpu = first_cpu; i < s->num_cpu; i++, cpu =
cpu->next_cpu) {
+ i = 0;
+ CPU_FOREACH(cpu) {
DeviceState *cpudev = DEVICE(cpu);
int ppibase = s->num_irq - 32 + i * 32;
+
+ if (i < s->num_cpu) {
+ break;
+ }
+
/* physical timer; we wire it up to the non-secure timer's ID,
* since a real A15 always has TrustZone but QEMU doesn't.
*/
@@ -83,6 +89,7 @@ static int a15mp_priv_init(SysBusDevice *dev)
/* virtual timer */
qdev_connect_gpio_out(cpudev, 1,
qdev_get_gpio_in(s->gic, ppibase + 27));
+ i++;
}
/* Memory map (addresses are offsets from PERIPHBASE):
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
- Re: [Qemu-ppc] [Qemu-devel] [PATCH qom-cpu for-next 1/2] cpu: Use QTAILQ for CPU list,
Andreas Färber <=