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[Qemu-ppc] [PULL 006/130] target-ppc: remove unsupported SPRs from 970 a
From: |
Alexander Graf |
Subject: |
[Qemu-ppc] [PULL 006/130] target-ppc: remove unsupported SPRs from 970 and P5+ |
Date: |
Fri, 7 Mar 2014 00:32:13 +0100 |
From: Alexey Kardashevskiy <address@hidden>
SPR_750FX_HID2 and L2CR are not defined in 970* user manuals nor POWER5
bookIV nor PowerISA 2.04, the numbers assigned to them are not defined
either so remove them.
Signed-off-by: Alexey Kardashevskiy <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/translate_init.c | 39 ---------------------------------------
1 file changed, 39 deletions(-)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index d645b1b..f5a8490 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -6644,20 +6644,10 @@ static void init_proc_970 (CPUPPCState *env)
&spr_read_generic, &spr_write_generic,
0x00000000);
/* XXX : not implemented */
- spr_register(env, SPR_750FX_HID2, "HID2",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
- 0x00000000);
- /* XXX : not implemented */
spr_register(env, SPR_970_HID5, "HID5",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
POWERPC970_HID5_INIT);
- /* XXX : not implemented */
- spr_register(env, SPR_L2CR, "L2CR",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, spr_access_nop,
- 0x00000000);
/* Memory management */
/* XXX: not correct */
gen_low_BATs(env);
@@ -6734,20 +6724,10 @@ static void init_proc_970FX (CPUPPCState *env)
&spr_read_generic, &spr_write_generic,
0x00000000);
/* XXX : not implemented */
- spr_register(env, SPR_750FX_HID2, "HID2",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
- 0x00000000);
- /* XXX : not implemented */
spr_register(env, SPR_970_HID5, "HID5",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
POWERPC970_HID5_INIT);
- /* XXX : not implemented */
- spr_register(env, SPR_L2CR, "L2CR",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, spr_access_nop,
- 0x00000000);
/* Memory management */
/* XXX: not correct */
gen_low_BATs(env);
@@ -6836,20 +6816,11 @@ static void init_proc_970MP (CPUPPCState *env)
&spr_read_generic, &spr_write_generic,
0x00000000);
/* XXX : not implemented */
- spr_register(env, SPR_750FX_HID2, "HID2",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
- 0x00000000);
- /* XXX : not implemented */
spr_register(env, SPR_970_HID5, "HID5",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
POWERPC970_HID5_INIT);
/* XXX : not implemented */
- spr_register(env, SPR_L2CR, "L2CR",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, spr_access_nop,
- 0x00000000);
/* Memory management */
/* XXX: not correct */
gen_low_BATs(env);
@@ -6918,20 +6889,10 @@ static void init_proc_power5plus(CPUPPCState *env)
&spr_read_generic, &spr_write_generic,
0x00000000);
/* XXX : not implemented */
- spr_register(env, SPR_750FX_HID2, "HID2",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
- 0x00000000);
- /* XXX : not implemented */
spr_register(env, SPR_970_HID5, "HID5",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
POWERPC970_HID5_INIT);
- /* XXX : not implemented */
- spr_register(env, SPR_L2CR, "L2CR",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, spr_access_nop,
- 0x00000000);
/* Memory management */
/* XXX: not correct */
gen_low_BATs(env);
--
1.8.1.4
- [Qemu-ppc] [PULL 00/130] ppc patch queue 2014-03-05, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 002/130] target-ppc: fix LPCR SPR number, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 001/130] target-ppc: fix compile error when PPC_DUMP_CPU is enabled, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 009/130] target-ppc: dump DAR and DSISR, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 010/130] target-ppc: fix Authority Mask Register init value, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 003/130] target-ppc: remove powerpc 970gx, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 005/130] target-ppc: remove embedded MMU SPRs from 970, P5+/7/7+/8, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 006/130] target-ppc: remove unsupported SPRs from 970 and P5+,
Alexander Graf <=
- [Qemu-ppc] [PULL 007/130] KVM: Split QEMUMachine typedef into separate header, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 016/130] target-ppc: disable unsupported modes for SPR_CTRL/SPR_UCTRL, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 014/130] spapr-pci: enable adding PHB via -device, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 012/130] PPC: KVM: fix "set one register", Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 027/130] target-ppc: Add VSX ISA2.06 Multiply Add Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 019/130] target-ppc: Add VSX ISA2.06 xadd/xsub Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 011/130] mmu-hash64: fix Virtual Page Class Key Protection, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 021/130] target-ppc: Add VSX ISA2.06 xdiv Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 004/130] target-ppc: fix SPR_CTRL/SPR_UCTRL register numbers, Alexander Graf, 2014/03/06