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[Qemu-ppc] [PATCH v10 2/2] target-ppc: gdbstub allow byte swapping for r
From: |
Thomas Falcon |
Subject: |
[Qemu-ppc] [PATCH v10 2/2] target-ppc: gdbstub allow byte swapping for reading/writing registers |
Date: |
Mon, 7 Apr 2014 17:41:00 -0400 |
This patch allows registers to be properly read from and written to
when using the gdbstub to debug a ppc guest running in little
endian mode.
Reviewed-by: Andreas Färber <address@hidden>
Signed-off-by: Thomas Falcon <address@hidden>
---
Difference from v9:
Fixed a coding style mistake
---
target-ppc/gdbstub.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/target-ppc/gdbstub.c b/target-ppc/gdbstub.c
index 0740af8..381a3c7 100644
--- a/target-ppc/gdbstub.c
+++ b/target-ppc/gdbstub.c
@@ -59,6 +59,17 @@ static int ppc_gdb_register_len(int n)
}
+static void ppc_gdb_swap_register(uint8_t *mem_buf, int n, int len)
+{
+ if (len == 4) {
+ bswap32s((uint32_t *)mem_buf);
+ } else if (len == 8) {
+ bswap64s((uint64_t *)mem_buf);
+ } else {
+ g_assert_not_reached();
+ }
+}
+
/* Old gdb always expects FP registers. Newer (xml-aware) gdb only
* expects whatever the target description contains. Due to a
* historical mishap the FP registers appear in between core integer
@@ -114,6 +125,10 @@ int ppc_cpu_gdb_read_register(CPUState *cs, uint8_t
*mem_buf, int n)
break;
}
}
+ if (msr_le) {
+ /* If cpu is in LE mode, convert memory contents to LE. */
+ ppc_gdb_swap_register(mem_buf, n, r);
+ }
return r;
}
@@ -126,6 +141,10 @@ int ppc_cpu_gdb_write_register(CPUState *cs, uint8_t
*mem_buf, int n)
if (!r) {
return r;
}
+ if (msr_le) {
+ /* If cpu is in LE mode, convert memory contents to LE. */
+ ppc_gdb_swap_register(mem_buf, n, r);
+ }
if (n < 32) {
/* gprs */
env->gpr[n] = ldtul_p(mem_buf);
--
1.8.3.1