[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-ppc] [PATCH 06/17] ppc: use CRF_* in int_helper.c
From: |
Paolo Bonzini |
Subject: |
[Qemu-ppc] [PATCH 06/17] ppc: use CRF_* in int_helper.c |
Date: |
Thu, 28 Aug 2014 19:15:02 +0200 |
Signed-off-by: Paolo Bonzini <address@hidden>
---
target-ppc/int_helper.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
index f6e8846..9c1c5cd 100644
--- a/target-ppc/int_helper.c
+++ b/target-ppc/int_helper.c
@@ -2303,25 +2303,25 @@ uint32_t helper_bcdadd(ppc_avr_t *r, ppc_avr_t *a,
ppc_avr_t *b, uint32_t ps)
if (sgna == sgnb) {
result.u8[BCD_DIG_BYTE(0)] = bcd_preferred_sgn(sgna, ps);
zero = bcd_add_mag(&result, a, b, &invalid, &overflow);
- cr = (sgna > 0) ? 4 : 8;
+ cr = (sgna > 0) ? 1 << CRF_GT : 1 << CRF_LT;
} else if (bcd_cmp_mag(a, b) > 0) {
result.u8[BCD_DIG_BYTE(0)] = bcd_preferred_sgn(sgna, ps);
zero = bcd_sub_mag(&result, a, b, &invalid, &overflow);
- cr = (sgna > 0) ? 4 : 8;
+ cr = (sgna > 0) ? 1 << CRF_GT : 1 << CRF_LT;
} else {
result.u8[BCD_DIG_BYTE(0)] = bcd_preferred_sgn(sgnb, ps);
zero = bcd_sub_mag(&result, b, a, &invalid, &overflow);
- cr = (sgnb > 0) ? 4 : 8;
+ cr = (sgnb > 0) ? 1 << CRF_GT : 1 << CRF_LT;
}
}
if (unlikely(invalid)) {
result.u64[HI_IDX] = result.u64[LO_IDX] = -1;
- cr = 1;
+ cr = 1 << CRF_SO;
} else if (overflow) {
- cr |= 1;
+ cr |= 1 << CRF_SO;
} else if (zero) {
- cr = 2;
+ cr = 1 << CRF_EQ;
}
*r = result;
--
1.8.3.1
- [Qemu-ppc] [RFT/RFH PATCH 00/16] PPC speedup patches for TCG, Paolo Bonzini, 2014/08/28
- [Qemu-ppc] [PATCH 01/17] ppc: do not look at the MMU index, Paolo Bonzini, 2014/08/28
- [Qemu-ppc] [PATCH 02/17] ppc: avoid excessive TLB flushing, Paolo Bonzini, 2014/08/28
- [Qemu-ppc] [PATCH 04/17] ppc: use ARRAY_SIZE in gdbstub.c, Paolo Bonzini, 2014/08/28
- [Qemu-ppc] [PATCH 03/17] ppc: fix monitor access to CR, Paolo Bonzini, 2014/08/28
- [Qemu-ppc] [PATCH 05/17] ppc: use CRF_* in fpu_helper.c, Paolo Bonzini, 2014/08/28
- [Qemu-ppc] [PATCH 06/17] ppc: use CRF_* in int_helper.c,
Paolo Bonzini <=
- [Qemu-ppc] [PATCH 07/17] ppc: fix result of DLMZB when no zero bytes are found, Paolo Bonzini, 2014/08/28
- [Qemu-ppc] [PATCH 08/17] ppc: introduce helpers for mfocrf/mtocrf, Paolo Bonzini, 2014/08/28
- [Qemu-ppc] [PATCH 09/17] ppc: reorganize gen_compute_fprf, Paolo Bonzini, 2014/08/28
- [Qemu-ppc] [PATCH 10/17] ppc: introduce gen_op_mfcr/gen_op_mtcr, Paolo Bonzini, 2014/08/28
- [Qemu-ppc] [PATCH 11/17] ppc: rename gen_set_cr6_from_fpscr, Paolo Bonzini, 2014/08/28
- [Qemu-ppc] [PATCH 14/17] ppc: introduce ppc_get_crf and ppc_set_crf, Paolo Bonzini, 2014/08/28
- [Qemu-ppc] [PATCH 13/17] ppc: compute mask from BI using right shift, Paolo Bonzini, 2014/08/28
- [Qemu-ppc] [PATCH 15/17] ppc: store CR registers in 32 1-bit registers, Paolo Bonzini, 2014/08/28
- [Qemu-ppc] [PATCH 16/17] ppc: inline ppc_get_crf/ppc_set_crf when clearer, Paolo Bonzini, 2014/08/28
- [Qemu-ppc] [PATCH 17/17] ppc: dump all 32 CR bits, Paolo Bonzini, 2014/08/28