[Qemu-ppc] [PATCH 0/2] intel_iommu: Add support for translation for devices behind bridges

[Knut Omang]

This patch set changes the data structure used to handle address spaces within
the emulated Intel iommu to support traversal also if bus numbers are 
dynamically
allocated, as is the case for devices that sit behind root ports or downstream 
switches.
This means that we cannot use bus number as index, instead a QLIST is used.

This requires a change in the API for setup of IOMMUs which is taken care of by 
the first patch. The second patch implements the fix.

Knut Omang (2):
  iommu: Replace bus+devfn arguments with PCIDevice* in PCIIOMMUFunc
  intel_iommu: Add support for translation for devices behind bridges.

 hw/alpha/typhoon.c            |  2 +-
 hw/i386/intel_iommu.c         | 58 ++++++++++++++++++-------------------------
 hw/pci-host/apb.c             |  2 +-
 hw/pci-host/prep.c            |  3 +--
 hw/pci-host/q35.c             | 41 +++++++++++++-----------------
 hw/pci/pci.c                  |  7 +++---
 hw/pci/pci_bridge.c           |  6 +++++
 hw/ppc/spapr_pci.c            |  2 +-
 include/hw/i386/intel_iommu.h |  6 +++--
 include/hw/pci/pci.h          |  4 ++-
 10 files changed, 61 insertions(+), 70 deletions(-)

-- 
1.9.0