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[Qemu-ppc] [PULL 00/66] ppc-for-2.8 queue 20160906
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 00/66] ppc-for-2.8 queue 20160906 |
Date: |
Tue, 6 Sep 2016 13:42:10 +1000 |
The following changes since commit e87d397e5ef66276ccc49b829527d605ca07d0ad:
Open 2.8 development tree (2016-09-05 11:38:54 +0100)
are available in the git repository at:
git://github.com/dgibson/qemu.git tags/ppc-for-2.8-20160906
for you to fetch changes up to 2ccbe3e29adb7c016bc5525d38d2a6e938c481af:
tests: Check serial output of firmware boot of some machines (2016-09-06
10:28:17 +1000)
----------------------------------------------------------------
ppc patch queue for 2016-Sep-6
This is my first pull request for the newly opened qemu-2.8 tree. It
contains a heap of things that were too late for 2.7 and have been
queued for a while. In particular:
* A number of preliminary patches for the powernv machine type
* A substantial cleanup of exception handling which will be
necessary to support running a TCG with hypervisor
facilities
* A start on support for POWER9
* Some TCG implementations for new POWER9 instructions
* Some TCG and related cleanups in preparation for POWER9
* Some assorted TCG optimizations
* An implementation of the H_CHANGE_LOGICAL_LAN_MAC hypercall
which allows the MAC address to be changed on the PAPR virtual
NIC.
* Add some extra test cases for several machines (this isn't
strictly in the ppc code, but is most value to ppc)
----------------------------------------------------------------
Aneesh Kumar K.V (1):
target-ppc: Introduce Power9 family
Benjamin Herrenschmidt (38):
ppc: Provide basic raise_exception_* functions
ppc: Move classic fp ops out of translate.c
ppc: Move embedded spe ops out of translate.c
ppc: Move DFP ops out of translate.c
ppc: Move VMX ops out of translate.c
ppc: Move VSX ops out of translate.c
ppc: Rename fload_invalid_op_excp to float_invalid_op_excp
ppc: Make float_invalid_op_excp() pass the return address
ppc: Make float_check_status() pass the return address
ppc: Don't update the NIP in floating point generated code
ppc: FP exceptions are always precise
ppc: Don't update NIP in lswi/lswx/stswi/stswx
ppc: Don't update NIP in lmw/stmw/icbi
ppc: Make tlb_fill() use new exception helper
ppc: Rework NIP updates vs. exception generation
ppc: Fix source NIP on SLB related interrupts
ppc: Don't update NIP in DCR access routines
ppc: Don't update NIP in facility unavailable interrupts
ppc: Don't update NIP BookE 2.06 tlbwe
ppc: Don't update NIP on conditional trap instructions
ppc: Don't update NIP if not taking alignment exceptions
ppc: Don't update NIP in dcbz and lscbx
ppc: Make alignment exceptions suck less
ppc: Handle unconditional (always/never) traps at translation time
ppc: Speed up dcbz
ppc: Fix CFAR updates
ppc: Don't set access_type on all load/stores on hash64
ppc: Use a helper to generate "LE unsupported" alignment interrupts
ppc: load/store multiple and string insns don't do LE
ppc: Speed up load/store multiple
ppc: Rename #include'd .c files to .inc.c
ppc: Fix macio ESCC legacy mapping
ppc: Fix catching some segfaults in user mode
ppc: Stop dumping state on all exceptions in linux-user
ppc: Don't generate dead code on unconditional branches
ppc: Improve flags for helpers loading/writing the time facilities
ppc: Improve the exception helpers flags
ppc: Improve a few more helper flags
Cédric Le Goater (3):
hw/ppc: include fdt helper routine in a common file
hw/ppc: use error_report instead of fprintf
hw/ppc: add a ppc_create_page_sizes_prop() helper routine
Greg Kurz (1):
xics_kvm: drop extra checking of kernel_xics_fd
Laurent Vivier (1):
spapr: implement H_CHANGE_LOGICAL_LAN_MAC h_call
Nikunj A Dadhania (13):
target-ppc: Introduce POWER ISA 3.0 flag
target-ppc: adding addpcis instruction
target-ppc: add cmprb instruction
target-ppc: add modulo word operations
target-ppc: add modulo dword operations
target-ppc: add cnttzw[.] instruction
target-ppc: add cmpeqb instruction
target-ppc: add maddld instruction
target-ppc: add maddhd and maddhdu instruction
target-ppc: introduce opc4 for Expanded Opcode
target-ppc: implement branch-less divw[o][.]
target-ppc: implement branch-less divd[o][.]
target-ppc: add extswsli[.] instruction
Sandipan Das (3):
target-ppc: add cnttzd[.] instruction
target-ppc: add dtstsfi[q] instructions
target-ppc: add vabsdu[b,h,w] instructions
Swapnil Bokade (1):
target-ppc: add vcmpnez[b,h,w][.] instructions
Thomas Huth (2):
tests: Resort check-qtest entries in Makefile.include
tests: Check serial output of firmware boot of some machines
Vivek Andrew Sha (3):
target-ppc: add setb instruction
target-ppc: add vslv instruction
target-ppc: add vsrv instruction
hw/intc/xics_kvm.c | 20 +-
hw/misc/macio/macio.c | 26 +-
hw/net/spapr_llan.c | 30 +
hw/ppc/Makefile.objs | 2 +-
hw/ppc/fdt.c | 49 +
hw/ppc/spapr.c | 59 +-
hw/ppc/spapr_drc.c | 8 +-
hw/ppc/spapr_events.c | 11 +-
hw/ppc/spapr_iommu.c | 4 +-
hw/ppc/spapr_rtas.c | 13 +-
hw/ppc/spapr_vio.c | 3 +-
include/hw/ppc/fdt.h | 30 +
linux-user/main.c | 25 +-
target-ppc/cpu-models.c | 5 +
target-ppc/cpu-models.h | 1 +
target-ppc/cpu-qom.h | 1 +
target-ppc/cpu.h | 14 +-
target-ppc/dfp_helper.c | 35 +
target-ppc/excp_helper.c | 203 +-
target-ppc/fpu_helper.c | 193 +-
target-ppc/helper.h | 76 +-
target-ppc/int_helper.c | 123 +
target-ppc/mem_helper.c | 153 +-
target-ppc/misc_helper.c | 9 +-
target-ppc/mmu-hash64.c | 16 +-
target-ppc/mmu_helper.c | 21 +-
target-ppc/timebase_helper.c | 23 +-
target-ppc/translate.c | 5984 +++++------------------------------
target-ppc/translate/dfp-impl.inc.c | 232 ++
target-ppc/translate/dfp-ops.inc.c | 165 +
target-ppc/translate/fp-impl.inc.c | 1070 +++++++
target-ppc/translate/fp-ops.inc.c | 111 +
target-ppc/translate/spe-impl.inc.c | 1229 +++++++
target-ppc/translate/spe-ops.inc.c | 105 +
target-ppc/translate/vmx-impl.inc.c | 843 +++++
target-ppc/translate/vmx-ops.inc.c | 259 ++
target-ppc/translate/vsx-impl.inc.c | 715 +++++
target-ppc/translate/vsx-ops.inc.c | 270 ++
target-ppc/translate_init.c | 214 +-
tests/Makefile.include | 52 +-
tests/boot-serial-test.c | 110 +
41 files changed, 6768 insertions(+), 5744 deletions(-)
create mode 100644 hw/ppc/fdt.c
create mode 100644 include/hw/ppc/fdt.h
create mode 100644 target-ppc/translate/dfp-impl.inc.c
create mode 100644 target-ppc/translate/dfp-ops.inc.c
create mode 100644 target-ppc/translate/fp-impl.inc.c
create mode 100644 target-ppc/translate/fp-ops.inc.c
create mode 100644 target-ppc/translate/spe-impl.inc.c
create mode 100644 target-ppc/translate/spe-ops.inc.c
create mode 100644 target-ppc/translate/vmx-impl.inc.c
create mode 100644 target-ppc/translate/vmx-ops.inc.c
create mode 100644 target-ppc/translate/vsx-impl.inc.c
create mode 100644 target-ppc/translate/vsx-ops.inc.c
create mode 100644 tests/boot-serial-test.c
- Re: [Qemu-ppc] [Qemu-devel] [PULL 00/66] ppc-for-2.8 queue 20160906, (continued)
[Qemu-ppc] [PULL 00/66] ppc-for-2.8 queue 20160906,
David Gibson <=
- [Qemu-ppc] [PULL 01/66] xics_kvm: drop extra checking of kernel_xics_fd, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 04/66] target-ppc: Introduce POWER ISA 3.0 flag, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 03/66] target-ppc: Introduce Power9 family, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 09/66] target-ppc: add cnttzd[.] instruction, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 23/66] ppc: Make float_invalid_op_excp() pass the return address, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 06/66] target-ppc: add cmprb instruction, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 15/66] target-ppc: introduce opc4 for Expanded Opcode, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 12/66] target-ppc: add setb instruction, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 14/66] target-ppc: add maddhd and maddhdu instruction, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 08/66] target-ppc: add modulo dword operations, David Gibson, 2016/09/05