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[Qemu-ppc] [PULL 01/48] target/ppc: Improve accuracy of guest HTM availa
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 01/48] target/ppc: Improve accuracy of guest HTM availability on P8s |
Date: |
Wed, 26 Apr 2017 16:59:47 +1000 |
From: Sam Bobroff <address@hidden>
On Power8 hosts it is currently theoretically possible for QEMU/KVM-HV guests
to receive a ibm,pa-features property indicating that HTM support is available
when it is not. The situation would occur if the platform firmware of
a Power8 host cleared the HTM bit of the ibm,pa-features property.
QEMU would query KVM for the availability of HTM, which will return no
support, but workaround code in kvm_arch_init_vcpu() would then
re-enable it because KVM_HV is in use and the processor is P8.
This patch adjusts the workaround in kvm_arch_init_vcpu() so that it does not
enable HTM (in the above case) unless the host kernel indicates to the QEMU
process, via the auxiliary vector, that userspace can use HTM (via the HWCAP2
bit KVM_FEATURE2_HTM).
The reason to use the value from the auxiliary vector is that it is
set based only on what the host kernel found in the ibm,pa-features
HTM bit at boot time.
Signed-off-by: Sam Bobroff <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target/ppc/kvm.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index 64017ac..c3d4262 100644
--- a/target/ppc/kvm.c
+++ b/target/ppc/kvm.c
@@ -49,6 +49,7 @@
#if defined(TARGET_PPC64)
#include "hw/ppc/spapr_cpu_core.h"
#endif
+#include "elf.h"
//#define DEBUG_KVM
@@ -509,8 +510,11 @@ int kvm_arch_init_vcpu(CPUState *cs)
case POWERPC_MMU_2_07:
if (!cap_htm && !kvmppc_is_pr(cs->kvm_state)) {
/* KVM-HV has transactional memory on POWER8 also without the
- * KVM_CAP_PPC_HTM extension, so enable it here instead. */
- cap_htm = true;
+ * KVM_CAP_PPC_HTM extension, so enable it here instead as
+ * long as it's availble to userspace on the host. */
+ if (qemu_getauxval(AT_HWCAP2) & PPC_FEATURE2_HAS_HTM) {
+ cap_htm = true;
+ }
}
break;
default:
--
2.9.3
- [Qemu-ppc] [PULL 00/48] ppc-for-2.10 queue 20170426, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 01/48] target/ppc: Improve accuracy of guest HTM availability on P8s,
David Gibson <=
- [Qemu-ppc] [PULL 04/48] hw/ppc/pnv: Classify the "PowerNV Chip" devices as CPU devices, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 03/48] ppc/spapr: QOM'ify sPAPRRTCState, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 10/48] spapr: move spapr_populate_pa_features(), David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 02/48] pseries: Add pseries-2.10 machine type, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 08/48] target/ppc: Add new H-CALL shells for in memory table translation, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 11/48] spapr: Enable ISA 3.0 MMU mode selection via CAS, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 20/48] ppc/xics: add a realize() handler to ICPStateClass, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 21/48] ppc/pnv: add a PnvICPState object, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 24/48] ppc/pnv: create the ICP object under PnvCore, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 06/48] spapr: Add ibm, processor-radix-AP-encodings to the device tree, David Gibson, 2017/04/26