[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-ppc] [PULL 17/26] spapr_pci: make index property mandatory
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 17/26] spapr_pci: make index property mandatory |
Date: |
Wed, 27 Sep 2017 17:43:07 +1000 |
From: Greg Kurz <address@hidden>
PHBs can be created with an index property, in which case the machine
code automatically sets all the MMIO windows at addresses derived from
the index. Alternatively, they can be manually created without index,
but the user has to provide addresses for all MMIO windows.
The non-index way happens to be more trouble than it's worth: it's
difficult to use, keeps requiring (potentially incompatible) changes
when some new parameter needs adding, and is awkward to check for
collisions. It currently even has a bug that prevents to use two
non-index PHBs because their child DRCs are all derived from the
same index == -1 value, and, thus, collide.
This patch hence makes the index property mandatory. As a consequence,
the PHB's memory regions and BUID are now always configured according
to the index, and it is no longer possible to set them from the command
line.
This DOES BREAK backwards compat, but we don't think the non-index
PHB feature was used in practice (at least libvirt doesn't) and the
simplification is worth it.
Signed-off-by: Greg Kurz <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/spapr_pci.c | 62 +++++++-----------------------------------------------
1 file changed, 8 insertions(+), 54 deletions(-)
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index cf54160526..6126c80044 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -1523,16 +1523,6 @@ static void spapr_phb_realize(DeviceState *dev, Error
**errp)
sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
Error *local_err = NULL;
- if ((sphb->buid != (uint64_t)-1) || (sphb->dma_liobn[0] !=
(uint32_t)-1)
- || (sphb->dma_liobn[1] != (uint32_t)-1 && windows_supported == 2)
- || (sphb->mem_win_addr != (hwaddr)-1)
- || (sphb->mem64_win_addr != (hwaddr)-1)
- || (sphb->io_win_addr != (hwaddr)-1)) {
- error_setg(errp, "Either \"index\" or other parameters must"
- " be specified for PAPR PHB, not both");
- return;
- }
-
smc->phb_placement(spapr, sphb->index,
&sphb->buid, &sphb->io_win_addr,
&sphb->mem_win_addr, &sphb->mem64_win_addr,
@@ -1541,46 +1531,20 @@ static void spapr_phb_realize(DeviceState *dev, Error
**errp)
error_propagate(errp, local_err);
return;
}
- }
-
- if (sphb->buid == (uint64_t)-1) {
- error_setg(errp, "BUID not specified for PHB");
- return;
- }
-
- if ((sphb->dma_liobn[0] == (uint32_t)-1) ||
- ((sphb->dma_liobn[1] == (uint32_t)-1) && (windows_supported > 1))) {
- error_setg(errp, "LIOBN(s) not specified for PHB");
- return;
- }
-
- if (sphb->mem_win_addr == (hwaddr)-1) {
- error_setg(errp, "Memory window address not specified for PHB");
- return;
- }
-
- if (sphb->io_win_addr == (hwaddr)-1) {
- error_setg(errp, "IO window address not specified for PHB");
+ } else {
+ error_setg(errp, "\"index\" for PAPR PHB is mandatory");
return;
}
if (sphb->mem64_win_size != 0) {
- if (sphb->mem64_win_addr == (hwaddr)-1) {
- error_setg(errp,
- "64-bit memory window address not specified for PHB");
- return;
- }
-
if (sphb->mem_win_size > SPAPR_PCI_MEM32_WIN_SIZE) {
error_setg(errp, "32-bit memory window of size 0x%"HWADDR_PRIx
" (max 2 GiB)", sphb->mem_win_size);
return;
}
- if (sphb->mem64_win_pciaddr == (hwaddr)-1) {
- /* 64-bit window defaults to identity mapping */
- sphb->mem64_win_pciaddr = sphb->mem64_win_addr;
- }
+ /* 64-bit window defaults to identity mapping */
+ sphb->mem64_win_pciaddr = sphb->mem64_win_addr;
} else if (sphb->mem_win_size > SPAPR_PCI_MEM32_WIN_SIZE) {
/*
* For compatibility with old configuration, if no 64-bit MMIO
@@ -1622,18 +1586,16 @@ static void spapr_phb_realize(DeviceState *dev, Error
**errp)
memory_region_add_subregion(get_system_memory(), sphb->mem_win_addr,
&sphb->mem32window);
- if (sphb->mem64_win_pciaddr != (hwaddr)-1) {
+ if (sphb->mem64_win_size != 0) {
namebuf = g_strdup_printf("%s.mmio64-alias", sphb->dtbusname);
memory_region_init_alias(&sphb->mem64window, OBJECT(sphb),
namebuf, &sphb->memspace,
sphb->mem64_win_pciaddr,
sphb->mem64_win_size);
g_free(namebuf);
- if (sphb->mem64_win_addr != (hwaddr)-1) {
- memory_region_add_subregion(get_system_memory(),
- sphb->mem64_win_addr,
- &sphb->mem64window);
- }
+ memory_region_add_subregion(get_system_memory(),
+ sphb->mem64_win_addr,
+ &sphb->mem64window);
}
/* Initialize IO regions */
@@ -1789,18 +1751,10 @@ static void spapr_phb_reset(DeviceState *qdev)
static Property spapr_phb_properties[] = {
DEFINE_PROP_UINT32("index", sPAPRPHBState, index, -1),
- DEFINE_PROP_UINT64("buid", sPAPRPHBState, buid, -1),
- DEFINE_PROP_UINT32("liobn", sPAPRPHBState, dma_liobn[0], -1),
- DEFINE_PROP_UINT32("liobn64", sPAPRPHBState, dma_liobn[1], -1),
- DEFINE_PROP_UINT64("mem_win_addr", sPAPRPHBState, mem_win_addr, -1),
DEFINE_PROP_UINT64("mem_win_size", sPAPRPHBState, mem_win_size,
SPAPR_PCI_MEM32_WIN_SIZE),
- DEFINE_PROP_UINT64("mem64_win_addr", sPAPRPHBState, mem64_win_addr, -1),
DEFINE_PROP_UINT64("mem64_win_size", sPAPRPHBState, mem64_win_size,
SPAPR_PCI_MEM64_WIN_SIZE),
- DEFINE_PROP_UINT64("mem64_win_pciaddr", sPAPRPHBState, mem64_win_pciaddr,
- -1),
- DEFINE_PROP_UINT64("io_win_addr", sPAPRPHBState, io_win_addr, -1),
DEFINE_PROP_UINT64("io_win_size", sPAPRPHBState, io_win_size,
SPAPR_PCI_IO_WIN_SIZE),
DEFINE_PROP_BOOL("dynamic-reconfiguration", sPAPRPHBState, dr_enabled,
--
2.13.5
- [Qemu-ppc] [PULL 06/26] ppc4xx: Add more PLB registers, (continued)
- [Qemu-ppc] [PULL 06/26] ppc4xx: Add more PLB registers, David Gibson, 2017/09/27
- [Qemu-ppc] [PULL 08/26] ppc/mac: Advertise a high clock frequency for NewWorld Macs, David Gibson, 2017/09/27
- [Qemu-ppc] [PULL 18/26] ppc: remove unused CPU definitions, David Gibson, 2017/09/27
- [Qemu-ppc] [PULL 15/26] ppc/pnv: Improve macro parenthesization, David Gibson, 2017/09/27
- [Qemu-ppc] [PULL 10/26] ppc/ide/macio: Add missing registers, David Gibson, 2017/09/27
- [Qemu-ppc] [PULL 05/26] ppc: Add 460EX embedded CPU, David Gibson, 2017/09/27
- [Qemu-ppc] [PULL 11/26] ppc: Fix OpenPIC model, David Gibson, 2017/09/27
- [Qemu-ppc] [PULL 01/26] ppc/kvm: check some capabilities with kvm_vm_check_extension(), David Gibson, 2017/09/27
- [Qemu-ppc] [PULL 09/26] ppc/mac: More rework of the DBDMA emulation, David Gibson, 2017/09/27
- [Qemu-ppc] [PULL 07/26] ppc: QOMify g3beige machine, David Gibson, 2017/09/27
- [Qemu-ppc] [PULL 17/26] spapr_pci: make index property mandatory,
David Gibson <=
- [Qemu-ppc] [PULL 25/26] macio: pass channel into MACIOIDEState via qdev property, David Gibson, 2017/09/27
- [Qemu-ppc] [PULL 13/26] ppc/kvm: generalize the use of kvmppc_get_htab_fd(), David Gibson, 2017/09/27
- [Qemu-ppc] [PULL 24/26] mac_dbdma: remove DBDMA_init() function, David Gibson, 2017/09/27
- [Qemu-ppc] [PULL 23/26] mac_dbdma: QOMify, David Gibson, 2017/09/27
- [Qemu-ppc] [PULL 12/26] ppc/kvm: change kvmppc_get_htab_fd() to return -errno on error, David Gibson, 2017/09/27
- [Qemu-ppc] [PULL 19/26] ppc: remove all unused CPU definitions, David Gibson, 2017/09/27
- [Qemu-ppc] [PULL 21/26] spapr: fix the value of SDR1 in kvmppc_put_books_sregs(), David Gibson, 2017/09/27
- [Qemu-ppc] [PULL 16/26] macio: convert pmac_ide_ops from old_mmio, David Gibson, 2017/09/27
- [Qemu-ppc] [PULL 26/26] macio: use object link between MACIO_IDE and MAC_DBDMA object, David Gibson, 2017/09/27
- [Qemu-ppc] [PULL 14/26] spapr: introduce helpers to migrate HPT chunks and the end marker, David Gibson, 2017/09/27