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[Qemu-ppc] [PULL 13/13] ppc/xive: Make XIVE generate the proper interrup
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 13/13] ppc/xive: Make XIVE generate the proper interrupt types |
Date: |
Wed, 12 Jun 2019 15:49:29 +1000 |
From: Benjamin Herrenschmidt <address@hidden>
It should be generic Hypervisor Virtualization interrupts for HV
directed rings and traditional External Interrupts for the OS directed
ring.
Don't generate anything for the user ring as it isn't actually
supported.
Signed-off-by: Benjamin Herrenschmidt <address@hidden>
Signed-off-by: Cédric Le Goater <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/intc/xive.c | 22 +++++++++++++++++++---
include/hw/ppc/xive.h | 3 ++-
2 files changed, 21 insertions(+), 4 deletions(-)
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index 0c74e47aa4..b2b92a92c8 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -61,13 +61,28 @@ static uint8_t exception_mask(uint8_t ring)
}
}
+static qemu_irq xive_tctx_output(XiveTCTX *tctx, uint8_t ring)
+{
+ switch (ring) {
+ case TM_QW0_USER:
+ return 0; /* Not supported */
+ case TM_QW1_OS:
+ return tctx->os_output;
+ case TM_QW2_HV_POOL:
+ case TM_QW3_HV_PHYS:
+ return tctx->hv_output;
+ default:
+ return 0;
+ }
+}
+
static uint64_t xive_tctx_accept(XiveTCTX *tctx, uint8_t ring)
{
uint8_t *regs = &tctx->regs[ring];
uint8_t nsr = regs[TM_NSR];
uint8_t mask = exception_mask(ring);
- qemu_irq_lower(tctx->output);
+ qemu_irq_lower(xive_tctx_output(tctx, ring));
if (regs[TM_NSR] & mask) {
uint8_t cppr = regs[TM_PIPR];
@@ -100,7 +115,7 @@ static void xive_tctx_notify(XiveTCTX *tctx, uint8_t ring)
default:
g_assert_not_reached();
}
- qemu_irq_raise(tctx->output);
+ qemu_irq_raise(xive_tctx_output(tctx, ring));
}
}
@@ -556,7 +571,8 @@ static void xive_tctx_realize(DeviceState *dev, Error
**errp)
env = &cpu->env;
switch (PPC_INPUT(env)) {
case PPC_FLAGS_INPUT_POWER9:
- tctx->output = env->irq_inputs[POWER9_INPUT_INT];
+ tctx->hv_output = env->irq_inputs[POWER9_INPUT_HINT];
+ tctx->os_output = env->irq_inputs[POWER9_INPUT_INT];
break;
default:
diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h
index d872f96d1a..a6ee7e831d 100644
--- a/include/hw/ppc/xive.h
+++ b/include/hw/ppc/xive.h
@@ -317,7 +317,8 @@ typedef struct XiveTCTX {
DeviceState parent_obj;
CPUState *cs;
- qemu_irq output;
+ qemu_irq hv_output;
+ qemu_irq os_output;
uint8_t regs[XIVE_TM_RING_COUNT * XIVE_TM_RING_SIZE];
} XiveTCTX;
--
2.21.0
- [Qemu-ppc] [PULL 00/13] ppc-for-4.1 queue 20190612, David Gibson, 2019/06/12
- [Qemu-ppc] [PULL 01/13] spapr_pci: Improve error message, David Gibson, 2019/06/12
- [Qemu-ppc] [PULL 02/13] target/ppc: Fix lxvw4x, lxvh8x and lxvb16x, David Gibson, 2019/06/12
- [Qemu-ppc] [PULL 03/13] spapr: Clean up device node name generation for PCI devices, David Gibson, 2019/06/12
- [Qemu-ppc] [PULL 12/13] ppc/pnv: activate the "dumpdtb" option on the powernv machine, David Gibson, 2019/06/12
- [Qemu-ppc] [PULL 06/13] spapr: Clean up spapr_drc_populate_dt(), David Gibson, 2019/06/12
- [Qemu-ppc] [PULL 13/13] ppc/xive: Make XIVE generate the proper interrupt types,
David Gibson <=
- [Qemu-ppc] [PULL 04/13] spapr: Clean up device tree construction for PCI devices, David Gibson, 2019/06/12
- [Qemu-ppc] [PULL 10/13] spapr: Allow hot plug/unplug of PCI bridges and devices under PCI bridges, David Gibson, 2019/06/12
- [Qemu-ppc] [PULL 07/13] spapr: Clean up DRC index construction, David Gibson, 2019/06/12
- [Qemu-ppc] [PULL 09/13] spapr: Direct all PCI hotplug to host bridge, rather than P2P bridge, David Gibson, 2019/06/12
- [Qemu-ppc] [PULL 11/13] target/ppc: Use tcg_gen_gvec_bitsel, David Gibson, 2019/06/12
- [Qemu-ppc] [PULL 08/13] spapr: Don't use bus number for building DRC ids, David Gibson, 2019/06/12
- [Qemu-ppc] [PULL 05/13] spapr: Clean up dt creation for PCI buses, David Gibson, 2019/06/12
- Re: [Qemu-ppc] [PULL 00/13] ppc-for-4.1 queue 20190612, Peter Maydell, 2019/06/12