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[PULL 33/44] target/ppc: Fix 64-bit decrementer
From: |
David Gibson |
Subject: |
[PULL 33/44] target/ppc: Fix 64-bit decrementer |
Date: |
Thu, 30 Sep 2021 15:44:15 +1000 |
From: Cédric Le Goater <clg@kaod.org>
The current way the mask is built can overflow with a 64-bit decrementer.
Use sextract64() to extract the signed values and remove the logic to
handle negative values which has become useless.
Cc: Luis Fernando Fujita Pires <luis.pires@eldorado.org.br>
Fixes: a8dafa525181 ("target/ppc: Implement large decrementer support for TCG")
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20210920061203.989563-5-clg@kaod.org>
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/ppc/ppc.c | 20 +++++++++-----------
1 file changed, 9 insertions(+), 11 deletions(-)
diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c
index b813ef732e..f5d012f860 100644
--- a/hw/ppc/ppc.c
+++ b/hw/ppc/ppc.c
@@ -821,14 +821,12 @@ static void __cpu_ppc_store_decr(PowerPCCPU *cpu,
uint64_t *nextp,
CPUPPCState *env = &cpu->env;
ppc_tb_t *tb_env = env->tb_env;
uint64_t now, next;
- bool negative;
+ int64_t signed_value;
+ int64_t signed_decr;
/* Truncate value to decr_width and sign extend for simplicity */
- value &= ((1ULL << nr_bits) - 1);
- negative = !!(value & (1ULL << (nr_bits - 1)));
- if (negative) {
- value |= (0xFFFFFFFFULL << nr_bits);
- }
+ signed_value = sextract64(value, 0, nr_bits);
+ signed_decr = sextract64(decr, 0, nr_bits);
trace_ppc_decr_store(nr_bits, decr, value);
@@ -850,16 +848,16 @@ static void __cpu_ppc_store_decr(PowerPCCPU *cpu,
uint64_t *nextp,
* On MSB edge based DEC implementations the MSB going from 0 -> 1 triggers
* an edge interrupt, so raise it here too.
*/
- if ((value < 3) ||
- ((tb_env->flags & PPC_DECR_UNDERFLOW_LEVEL) && negative) ||
- ((tb_env->flags & PPC_DECR_UNDERFLOW_TRIGGERED) && negative
- && !(decr & (1ULL << (nr_bits - 1))))) {
+ if ((signed_value < 3) ||
+ ((tb_env->flags & PPC_DECR_UNDERFLOW_LEVEL) && signed_value < 0) ||
+ ((tb_env->flags & PPC_DECR_UNDERFLOW_TRIGGERED) && signed_value < 0
+ && signed_decr >= 0)) {
(*raise_excp)(cpu);
return;
}
/* On MSB level based systems a 0 for the MSB stops interrupt delivery */
- if (!negative && (tb_env->flags & PPC_DECR_UNDERFLOW_LEVEL)) {
+ if (signed_value >= 0 && (tb_env->flags & PPC_DECR_UNDERFLOW_LEVEL)) {
(*lower_excp)(cpu);
}
--
2.31.1
- [PULL 25/44] spapr_numa.c: split FORM1 code into helpers, (continued)
- [PULL 25/44] spapr_numa.c: split FORM1 code into helpers, David Gibson, 2021/09/30
- [PULL 21/44] target/ppc: Convert debug to trace events (exceptions), David Gibson, 2021/09/30
- [PULL 22/44] target/ppc: Replace debug messages by asserts for unknown IRQ pins, David Gibson, 2021/09/30
- [PULL 23/44] target/ppc: add LPCR[HR] to DisasContext and hflags, David Gibson, 2021/09/30
- [PULL 24/44] target/ppc: Check privilege level based on PSR and LPCR[HR] in tlbie[l], David Gibson, 2021/09/30
- [PULL 26/44] spapr_numa.c: scrap 'legacy_numa' concept, David Gibson, 2021/09/30
- [PULL 27/44] spapr_numa.c: parametrize FORM1 macros, David Gibson, 2021/09/30
- [PULL 29/44] spapr: move FORM1 verifications to post CAS, David Gibson, 2021/09/30
- [PULL 32/44] target/ppc: Convert debug to trace events (decrementer and IRQ), David Gibson, 2021/09/30
- [PULL 36/44] hw/intc: openpic: Clean up the styles, David Gibson, 2021/09/30
- [PULL 33/44] target/ppc: Fix 64-bit decrementer,
David Gibson <=
- [PULL 31/44] spapr_numa.c: handle auto NUMA node with no distance info, David Gibson, 2021/09/30
- [PULL 28/44] spapr_numa.c: rename numa_assoc_array to FORM1_assoc_array, David Gibson, 2021/09/30
- [PULL 34/44] hw/intc: openpic: Correct the reset value of IPIDR for FSL chipset, David Gibson, 2021/09/30
- [PULL 35/44] hw/intc: openpic: Drop Raven related codes, David Gibson, 2021/09/30
- [PULL 30/44] spapr_numa.c: FORM2 NUMA affinity support, David Gibson, 2021/09/30
- [PULL 37/44] spapr_numa.c: fixes in spapr_numa_FORM2_write_rtas_tables(), David Gibson, 2021/09/30
- [PULL 38/44] spapr/xive: Fix kvm_xive_source_reset trace event, David Gibson, 2021/09/30
- [PULL 39/44] MAINTAINERS: Remove machine specific files from ppc TCG CPUs entry, David Gibson, 2021/09/30
- [PULL 40/44] MAINTAINERS: Remove David & Greg as reviewers for a number of boards, David Gibson, 2021/09/30
- [PULL 41/44] MAINTAINERS: Orphan obscure ppc platforms, David Gibson, 2021/09/30