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[PULL 16/34] target/ppc: use int128.h methods in vsubuqm
From: |
Daniel Henrique Barboza |
Subject: |
[PULL 16/34] target/ppc: use int128.h methods in vsubuqm |
Date: |
Wed, 6 Jul 2022 17:09:28 -0300 |
From: Matheus Ferst <matheus.ferst@eldorado.org.br>
And also move the insn to decodetree
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: VĂctor Colombo <victor.colombo@eldorado.org.br>
Message-Id: <20220606150037.338931-6-matheus.ferst@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
target/ppc/helper.h | 2 +-
target/ppc/insn32.decode | 2 ++
target/ppc/int_helper.c | 19 ++-----------------
target/ppc/translate/vmx-impl.c.inc | 5 ++---
target/ppc/translate/vmx-ops.c.inc | 2 +-
5 files changed, 8 insertions(+), 22 deletions(-)
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index f6b1b2fad2..1c02ad85e5 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -208,7 +208,7 @@ DEF_HELPER_FLAGS_3(VADDUQM, TCG_CALL_NO_RWG, void, avr,
avr, avr)
DEF_HELPER_FLAGS_4(VADDECUQ, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
DEF_HELPER_FLAGS_4(VADDEUQM, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
DEF_HELPER_FLAGS_3(VADDCUQ, TCG_CALL_NO_RWG, void, avr, avr, avr)
-DEF_HELPER_FLAGS_3(vsubuqm, TCG_CALL_NO_RWG, void, avr, avr, avr)
+DEF_HELPER_FLAGS_3(VSUBUQM, TCG_CALL_NO_RWG, void, avr, avr, avr)
DEF_HELPER_FLAGS_4(vsubecuq, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
DEF_HELPER_FLAGS_4(vsubeuqm, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
DEF_HELPER_FLAGS_3(vsubcuq, TCG_CALL_NO_RWG, void, avr, avr, avr)
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index 35252ddd4f..a8d3a5a8a1 100644
--- a/target/ppc/insn32.decode
+++ b/target/ppc/insn32.decode
@@ -556,6 +556,8 @@ VADDUQM 000100 ..... ..... ..... 00100000000 @VX
VADDEUQM 000100 ..... ..... ..... ..... 111100 @VA
VADDECUQ 000100 ..... ..... ..... ..... 111101 @VA
+VSUBUQM 000100 ..... ..... ..... 10100000000 @VX
+
VEXTSB2W 000100 ..... 10000 ..... 11000000010 @VX_tb
VEXTSH2W 000100 ..... 10001 ..... 11000000010 @VX_tb
VEXTSB2D 000100 ..... 11000 ..... 11000000010 @VX_tb
diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index 279333a814..159b831d97 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -2176,12 +2176,6 @@ VGENERIC_DO(popcntd, u64)
#undef VGENERIC_DO
-#if HOST_BIG_ENDIAN
-#define QW_ONE { .u64 = { 0, 1 } }
-#else
-#define QW_ONE { .u64 = { 1, 0 } }
-#endif
-
#ifndef CONFIG_INT128
static inline void avr_qw_not(ppc_avr_t *t, ppc_avr_t a)
@@ -2245,18 +2239,9 @@ void helper_VADDECUQ(ppc_avr_t *r, ppc_avr_t *a,
ppc_avr_t *b, ppc_avr_t *c)
r->VsrD(1) = carry_out;
}
-void helper_vsubuqm(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
+void helper_VSUBUQM(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
{
-#ifdef CONFIG_INT128
- r->u128 = a->u128 - b->u128;
-#else
- ppc_avr_t tmp;
- ppc_avr_t one = QW_ONE;
-
- avr_qw_not(&tmp, *b);
- avr_qw_add(&tmp, *a, tmp);
- avr_qw_add(r, tmp, one);
-#endif
+ r->s128 = int128_sub(a->s128, b->s128);
}
void helper_vsubeuqm(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c)
diff --git a/target/ppc/translate/vmx-impl.c.inc
b/target/ppc/translate/vmx-impl.c.inc
index 8c0e5bcc03..1e665534c3 100644
--- a/target/ppc/translate/vmx-impl.c.inc
+++ b/target/ppc/translate/vmx-impl.c.inc
@@ -1234,7 +1234,6 @@ GEN_VXFORM_SAT(vsubuws, MO_32, sub, ussub, 0, 26);
GEN_VXFORM_SAT(vsubsbs, MO_8, sub, sssub, 0, 28);
GEN_VXFORM_SAT(vsubshs, MO_16, sub, sssub, 0, 29);
GEN_VXFORM_SAT(vsubsws, MO_32, sub, sssub, 0, 30);
-GEN_VXFORM(vsubuqm, 0, 20);
GEN_VXFORM(vsubcuq, 0, 21);
GEN_VXFORM3(vsubeuqm, 31, 0);
GEN_VXFORM3(vsubecuq, 31, 0);
@@ -2858,8 +2857,6 @@ GEN_VXFORM_DUAL(vsubuwm, PPC_ALTIVEC, PPC_NONE, \
bcdus, PPC_NONE, PPC2_ISA300)
GEN_VXFORM_DUAL(vsubsbs, PPC_ALTIVEC, PPC_NONE, \
bcdtrunc, PPC_NONE, PPC2_ISA300)
-GEN_VXFORM_DUAL(vsubuqm, PPC2_ALTIVEC_207, PPC_NONE, \
- bcdtrunc, PPC_NONE, PPC2_ISA300)
GEN_VXFORM_DUAL(vsubcuq, PPC2_ALTIVEC_207, PPC_NONE, \
bcdutrunc, PPC_NONE, PPC2_ISA300)
@@ -3102,6 +3099,8 @@ TRANS_FLAGS2(ALTIVEC_207, VADDUQM, do_vx_helper,
gen_helper_VADDUQM)
TRANS_FLAGS2(ALTIVEC_207, VPMSUMD, do_vx_helper, gen_helper_VPMSUMD)
+TRANS_FLAGS2(ALTIVEC_207, VSUBUQM, do_vx_helper, gen_helper_VSUBUQM)
+
static bool do_vx_vmuleo(DisasContext *ctx, arg_VX *a, bool even,
void (*gen_mul)(TCGv_i64, TCGv_i64, TCGv_i64,
TCGv_i64))
{
diff --git a/target/ppc/translate/vmx-ops.c.inc
b/target/ppc/translate/vmx-ops.c.inc
index 33e05929cb..9feef9afee 100644
--- a/target/ppc/translate/vmx-ops.c.inc
+++ b/target/ppc/translate/vmx-ops.c.inc
@@ -126,7 +126,7 @@ GEN_VXFORM(vsubuws, 0, 26),
GEN_VXFORM_DUAL(vsubsbs, bcdtrunc, 0, 28, PPC_ALTIVEC, PPC2_ISA300),
GEN_VXFORM(vsubshs, 0, 29),
GEN_VXFORM_DUAL(vsubsws, xpnd04_2, 0, 30, PPC_ALTIVEC, PPC_NONE),
-GEN_VXFORM_DUAL(vsubuqm, bcdtrunc, 0, 20, PPC2_ALTIVEC_207, PPC2_ISA300),
+GEN_VXFORM_300(bcdtrunc, 0, 20),
GEN_VXFORM_DUAL(vsubcuq, bcdutrunc, 0, 21, PPC2_ALTIVEC_207, PPC2_ISA300),
GEN_VXFORM_DUAL(vsubeuqm, vsubecuq, 31, 0xFF, PPC_NONE, PPC2_ALTIVEC_207),
GEN_VXFORM(vsl, 2, 7),
--
2.36.1
- [PULL 04/34] ppc/pnv: make pnv_ics_get() use the chip8->phbs[] array, (continued)
- [PULL 04/34] ppc/pnv: make pnv_ics_get() use the chip8->phbs[] array, Daniel Henrique Barboza, 2022/07/06
- [PULL 05/34] ppc/pnv: make pnv_ics_resend() use chip8->phbs[], Daniel Henrique Barboza, 2022/07/06
- [PULL 06/34] ppc/pnv: make pnv_chip_power8_pic_print_info() use chip8->phbs[], Daniel Henrique Barboza, 2022/07/06
- [PULL 08/34] ppc/pnv: remove 'INTERFACE_PCIE_DEVICE' from phb4 root bus, Daniel Henrique Barboza, 2022/07/06
- [PULL 07/34] ppc/pnv: remove 'INTERFACE_PCIE_DEVICE' from phb3 root bus, Daniel Henrique Barboza, 2022/07/06
- [PULL 10/34] spapr/ddw: Reset DMA when the last non-default window is removed, Daniel Henrique Barboza, 2022/07/06
- [PULL 11/34] spapr/ddw: Implement 64bit query extension, Daniel Henrique Barboza, 2022/07/06
- [PULL 09/34] target/ppc: Change FPSCR_* to follow POWER ISA numbering convention, Daniel Henrique Barboza, 2022/07/06
- [PULL 20/34] ppc/spapr: Implement H_WATCHDOG, Daniel Henrique Barboza, 2022/07/06
- [PULL 19/34] ppc: Define SETFIELD for the ppc target, Daniel Henrique Barboza, 2022/07/06
- [PULL 16/34] target/ppc: use int128.h methods in vsubuqm,
Daniel Henrique Barboza <=
- [PULL 14/34] target/ppc: use int128.h methods in vaddecuq and vaddeuqm, Daniel Henrique Barboza, 2022/07/06
- [PULL 12/34] target/ppc: use int128.h methods in vpmsumd, Daniel Henrique Barboza, 2022/07/06
- [PULL 13/34] target/ppc: use int128.h methods in vadduqm, Daniel Henrique Barboza, 2022/07/06
- [PULL 21/34] target/ppc: Fix insn32.decode style issues, Daniel Henrique Barboza, 2022/07/06
- [PULL 18/34] target/ppc: use int128.h methods in vsubcuq, Daniel Henrique Barboza, 2022/07/06
- [PULL 17/34] target/ppc: use int128.h methods in vsubecuq and vsubeuqm, Daniel Henrique Barboza, 2022/07/06
- [PULL 15/34] target/ppc: use int128.h methods in vaddcuq, Daniel Henrique Barboza, 2022/07/06
- [PULL 24/34] target/ppc: Move mffsl to decodetree, Daniel Henrique Barboza, 2022/07/06
- [PULL 29/34] target/ppc: implement addg6s, Daniel Henrique Barboza, 2022/07/06
- [PULL 25/34] target/ppc: Move mffs[.] to decodetree, Daniel Henrique Barboza, 2022/07/06