[RFC PATCH v2 0/2] Implement Power ISA 3.1B hash insns

[Víctor Colombo]

This patch series implements the 4 instructions added in Power ISA
3.1B:

- hashchk
- hashst
- hashchkp
- hashstp

What do you think about the choice to implement the hash algorithm
from the ground up, following the SIMON-like algorithm presented in
Power ISA? IIUC, this algorithm is not the same as the original[1].
Other options would be to use other algorithm already implemented
in QEMU, or even make this instruction a nop for all Power versions.

Also, I was thinking about using the call to spr_register_kvm() in
init_proc_POWER10 to initialize the registers with a random value.
I'm not sure what is the behavior here, I would expect that is the job
of the OS to set the regs, but looks like KVM is not exporting them,
so they are always 0 (?). Does anyone have any insight on this?

v1->v2:
- Split the patch in 2
- Rebase to master

[1] https://eprint.iacr.org/2013/404.pdf

Víctor Colombo (2):
  target/ppc: Implement hashst and hashchk instructions
  target/ppc: Implement hashstp and hashchkp

 linux-headers/asm-powerpc/kvm.h            |  3 +
 target/ppc/cpu.h                           |  2 +
 target/ppc/cpu_init.c                      |  7 ++
 target/ppc/excp_helper.c                   | 82 ++++++++++++++++++++++
 target/ppc/helper.h                        |  4 ++
 target/ppc/insn32.decode                   | 10 +++
 target/ppc/translate.c                     |  5 ++
 target/ppc/translate/fixedpoint-impl.c.inc | 34 +++++++++
 8 files changed, 147 insertions(+)

-- 
2.25.1