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Re: [PATCH v3 08/14] target/ppc: Fix gen_sc to use correct nip
From: |
Nicholas Piggin |
Subject: |
Re: [PATCH v3 08/14] target/ppc: Fix gen_sc to use correct nip |
Date: |
Tue, 20 Jun 2023 14:03:04 +1000 |
On Fri Jun 16, 2023 at 9:03 AM AEST, BALATON Zoltan wrote:
> Most exceptions are raised with nip pointing to the faulting
> instruction but the sc instruction generating a syscall exception
> leaves nip pointing to next instruction. Fix gen_sc to not use
> gen_exception_err() which sets nip back but correctly set nip to
> pc_next so we don't have to patch this in the exception handlers.
>
> This changes the nip logged in dump_syscall and dump_hcall debug
> functions but now this matches how nip would be on a real CPU.
I think this is okay. I'll just send a possible scv change after
this goes in.
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
>
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
> ---
> target/ppc/excp_helper.c | 39 ---------------------------------------
> target/ppc/translate.c | 8 +++++---
> 2 files changed, 5 insertions(+), 42 deletions(-)
>
> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
> index f19a0f2d1d..903216c2a6 100644
> --- a/target/ppc/excp_helper.c
> +++ b/target/ppc/excp_helper.c
> @@ -495,12 +495,6 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
> break;
> case POWERPC_EXCP_SYSCALL: /* System call exception
> */
> dump_syscall(env);
> -
> - /*
> - * We need to correct the NIP which in this case is supposed
> - * to point to the next instruction
> - */
> - env->nip += 4;
> break;
> case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt
> */
> trace_ppc_excp_print("FIT");
> @@ -611,12 +605,6 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp)
> break;
> case POWERPC_EXCP_SYSCALL: /* System call exception
> */
> dump_syscall(env);
> -
> - /*
> - * We need to correct the NIP which in this case is supposed
> - * to point to the next instruction
> - */
> - env->nip += 4;
> break;
> case POWERPC_EXCP_FPU: /* Floating-point unavailable exception
> */
> case POWERPC_EXCP_DECR: /* Decrementer exception
> */
> @@ -759,13 +747,6 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
> } else {
> dump_syscall(env);
> }
> -
> - /*
> - * We need to correct the NIP which in this case is supposed
> - * to point to the next instruction
> - */
> - env->nip += 4;
> -
> /*
> * The Virtual Open Firmware (VOF) relies on the 'sc 1'
> * instruction to communicate with QEMU. The pegasos2 machine
> @@ -910,13 +891,6 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
> } else {
> dump_syscall(env);
> }
> -
> - /*
> - * We need to correct the NIP which in this case is supposed
> - * to point to the next instruction
> - */
> - env->nip += 4;
> -
> /*
> * The Virtual Open Firmware (VOF) relies on the 'sc 1'
> * instruction to communicate with QEMU. The pegasos2 machine
> @@ -1075,12 +1049,6 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int
> excp)
> break;
> case POWERPC_EXCP_SYSCALL: /* System call exception
> */
> dump_syscall(env);
> -
> - /*
> - * We need to correct the NIP which in this case is supposed
> - * to point to the next instruction
> - */
> - env->nip += 4;
> break;
> case POWERPC_EXCP_FPU: /* Floating-point unavailable exception
> */
> case POWERPC_EXCP_APU: /* Auxiliary processor unavailable
> */
> @@ -1322,13 +1290,6 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int
> excp)
> } else {
> dump_syscall(env);
> }
> -
> - /*
> - * We need to correct the NIP which in this case is supposed
> - * to point to the next instruction
> - */
> - env->nip += 4;
> -
> /* "PAPR mode" built-in hypercall emulation */
> if (lev == 1 && books_vhyp_handles_hcall(cpu)) {
> PPCVirtualHypervisorClass *vhc =
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index a32a9b8a5f..4260d3d66f 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -4419,10 +4419,12 @@ static void gen_hrfid(DisasContext *ctx)
> #endif
> static void gen_sc(DisasContext *ctx)
> {
> - uint32_t lev;
> + uint32_t lev = (ctx->opcode >> 5) & 0x7F;
>
> - lev = (ctx->opcode >> 5) & 0x7F;
> - gen_exception_err(ctx, POWERPC_SYSCALL, lev);
> + gen_update_nip(ctx, ctx->base.pc_next);
> + gen_helper_raise_exception_err(cpu_env,
> tcg_constant_i32(POWERPC_SYSCALL),
> + tcg_constant_i32(lev));
> + ctx->base.is_jmp = DISAS_NORETURN;
> }
>
> #if defined(TARGET_PPC64)
> --
> 2.30.9
- [PATCH v3 05/14] target/ppc: Remove some more local CPUState variables only used once, (continued)
- [PATCH v3 05/14] target/ppc: Remove some more local CPUState variables only used once, BALATON Zoltan, 2023/06/15
- [PATCH v3 03/14] target/ppc: Move common check in exception handlers to a function, BALATON Zoltan, 2023/06/15
- [PATCH v3 04/14] target/ppc: Use env_cpu for cpu_abort in excp_helper, BALATON Zoltan, 2023/06/15
- [PATCH v3 07/14] target/ppd: Remove unused define, BALATON Zoltan, 2023/06/15
- [PATCH v3 06/14] target/ppc: Readability improvements in exception handlers, BALATON Zoltan, 2023/06/15
- [PATCH v3 08/14] target/ppc: Fix gen_sc to use correct nip, BALATON Zoltan, 2023/06/15
- Re: [PATCH v3 08/14] target/ppc: Fix gen_sc to use correct nip,
Nicholas Piggin <=
- [PATCH v3 02/14] target/ppc: Remove unneeded parameter from powerpc_reset_wakeup(), BALATON Zoltan, 2023/06/15
- [PATCH v3 09/14] target/ppc: Move patching nip from exception handler to helper_scv, BALATON Zoltan, 2023/06/15
Re: [PATCH v3 09/14] target/ppc: Move patching nip from exception handler to helper_scv, Nicholas Piggin, 2023/06/26
[PATCH v3 10/14] target/ppc: Simplify syscall exception handlers, BALATON Zoltan, 2023/06/15