[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v2 09/14] ppc440: Remove ppc460ex_pcie_init legacy init function
From: |
BALATON Zoltan |
Subject: |
[PATCH v2 09/14] ppc440: Remove ppc460ex_pcie_init legacy init function |
Date: |
Wed, 5 Jul 2023 22:12:54 +0200 (CEST) |
After previous changes we can now remove the legacy init function and
move the device creation to board code.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/ppc/ppc440.h | 1 -
hw/ppc/ppc440_uc.c | 21 ---------------------
hw/ppc/sam460ex.c | 17 ++++++++++++++++-
include/hw/ppc/ppc4xx.h | 1 +
4 files changed, 17 insertions(+), 23 deletions(-)
diff --git a/hw/ppc/ppc440.h b/hw/ppc/ppc440.h
index ae42bcf0c8..909373fb38 100644
--- a/hw/ppc/ppc440.h
+++ b/hw/ppc/ppc440.h
@@ -18,6 +18,5 @@ void ppc4xx_cpr_init(CPUPPCState *env);
void ppc4xx_sdr_init(CPUPPCState *env);
void ppc4xx_ahb_init(CPUPPCState *env);
void ppc4xx_dma_init(CPUPPCState *env, int dcr_base);
-void ppc460ex_pcie_init(PowerPCCPU *cpu);
#endif /* PPC440_H */
diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c
index b74b2212fa..4181c843a8 100644
--- a/hw/ppc/ppc440_uc.c
+++ b/hw/ppc/ppc440_uc.c
@@ -770,7 +770,6 @@ void ppc4xx_dma_init(CPUPPCState *env, int dcr_base)
*/
#include "hw/pci/pcie_host.h"
-#define TYPE_PPC460EX_PCIE_HOST "ppc460ex-pcie-host"
OBJECT_DECLARE_SIMPLE_TYPE(PPC460EXPCIEState, PPC460EX_PCIE_HOST)
struct PPC460EXPCIEState {
@@ -799,9 +798,6 @@ struct PPC460EXPCIEState {
uint32_t cfg;
};
-#define DCRN_PCIE0_BASE 0x100
-#define DCRN_PCIE1_BASE 0x120
-
enum {
PEGPL_CFGBAH = 0x0,
PEGPL_CFGBAL,
@@ -1096,20 +1092,3 @@ static void ppc460ex_pcie_register(void)
}
type_init(ppc460ex_pcie_register)
-
-void ppc460ex_pcie_init(PowerPCCPU *cpu)
-{
- DeviceState *dev;
-
- dev = qdev_new(TYPE_PPC460EX_PCIE_HOST);
- qdev_prop_set_int32(dev, "busnum", 0);
- qdev_prop_set_int32(dev, "dcrn-base", DCRN_PCIE0_BASE);
- object_property_set_link(OBJECT(dev), "cpu", OBJECT(cpu), &error_abort);
- sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
-
- dev = qdev_new(TYPE_PPC460EX_PCIE_HOST);
- qdev_prop_set_int32(dev, "busnum", 1);
- qdev_prop_set_int32(dev, "dcrn-base", DCRN_PCIE1_BASE);
- object_property_set_link(OBJECT(dev), "cpu", OBJECT(cpu), &error_abort);
- sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
-}
diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c
index f098226974..d446cfc37b 100644
--- a/hw/ppc/sam460ex.c
+++ b/hw/ppc/sam460ex.c
@@ -45,6 +45,9 @@
/* dd bs=1 skip=$(($(stat -c '%s' updater/updater-460) - 0x80000)) \
if=updater/updater-460 of=u-boot-sam460-20100605.bin */
+#define PCIE0_DCRN_BASE 0x100
+#define PCIE1_DCRN_BASE 0x120
+
/* from Sam460 U-Boot include/configs/Sam460ex.h */
#define FLASH_BASE 0xfff00000
#define FLASH_BASE_H 0x4
@@ -421,8 +424,20 @@ static void sam460ex_init(MachineState *machine)
usb_create_simple(usb_bus_find(-1), "usb-kbd");
usb_create_simple(usb_bus_find(-1), "usb-mouse");
+ /* PCIe buses */
+ dev = qdev_new(TYPE_PPC460EX_PCIE_HOST);
+ qdev_prop_set_int32(dev, "busnum", 0);
+ qdev_prop_set_int32(dev, "dcrn-base", PCIE0_DCRN_BASE);
+ object_property_set_link(OBJECT(dev), "cpu", OBJECT(cpu), &error_abort);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
+
+ dev = qdev_new(TYPE_PPC460EX_PCIE_HOST);
+ qdev_prop_set_int32(dev, "busnum", 1);
+ qdev_prop_set_int32(dev, "dcrn-base", PCIE1_DCRN_BASE);
+ object_property_set_link(OBJECT(dev), "cpu", OBJECT(cpu), &error_abort);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
+
/* PCI bus */
- ppc460ex_pcie_init(cpu);
/* All PCI irqs are connected to the same UIC pin (cf. UBoot source) */
dev = sysbus_create_simple("ppc440-pcix-host", 0xc0ec00000,
qdev_get_gpio_in(uic[1], 0));
diff --git a/include/hw/ppc/ppc4xx.h b/include/hw/ppc/ppc4xx.h
index f8c86e09ec..39ca602442 100644
--- a/include/hw/ppc/ppc4xx.h
+++ b/include/hw/ppc/ppc4xx.h
@@ -30,6 +30,7 @@
#include "hw/sysbus.h"
#define TYPE_PPC4xx_PCI_HOST_BRIDGE "ppc4xx-pcihost"
+#define TYPE_PPC460EX_PCIE_HOST "ppc460ex-pcie-host"
/*
* Generic DCR device
--
2.30.9
- [PATCH v2 00/14] PPC440 devices misc clean up, BALATON Zoltan, 2023/07/05
- [PATCH v2 01/14] ppc440: Change ppc460ex_pcie_init() parameter type, BALATON Zoltan, 2023/07/05
- [PATCH v2 02/14] ppc440: Add cpu link property to PCIe controller model, BALATON Zoltan, 2023/07/05
- [PATCH v2 03/14] ppc440: Add a macro to shorten PCIe controller DCR registration, BALATON Zoltan, 2023/07/05
- [PATCH v2 06/14] ppc440: Stop using system io region for PCIe buses, BALATON Zoltan, 2023/07/05
- [PATCH v2 04/14] ppc440: Rename parent field of PPC460EXPCIEState to match code style, BALATON Zoltan, 2023/07/05
- [PATCH v2 08/14] ppc440: Add busnum property to PCIe controller model, BALATON Zoltan, 2023/07/05
- [PATCH v2 05/14] ppc440: Rename local variable in dcr_read_pcie(), BALATON Zoltan, 2023/07/05
- [PATCH v2 09/14] ppc440: Remove ppc460ex_pcie_init legacy init function,
BALATON Zoltan <=
- [PATCH v2 07/14] ppc/sam460ex: Remove address_space_mem local variable, BALATON Zoltan, 2023/07/05
- [PATCH v2 10/14] ppc4xx_pci: Rename QOM type name define, BALATON Zoltan, 2023/07/05
- [PATCH v2 14/14] ppc440_pcix: Stop using system io region for PCI bus, BALATON Zoltan, 2023/07/05
- [PATCH v2 11/14] ppc4xx_pci: Add define for ppc4xx-host-bridge type name, BALATON Zoltan, 2023/07/05
- [PATCH v2 12/14] ppc440_pcix: Rename QOM type define abd move it to common header, BALATON Zoltan, 2023/07/05
- [PATCH v2 13/14] ppc440_pcix: Don't use iomem for regs, BALATON Zoltan, 2023/07/05
- Re: [PATCH v2 00/14] PPC440 devices misc clean up, BALATON Zoltan, 2023/07/05
- Re: [PATCH v2 00/14] PPC440 devices misc clean up, Daniel Henrique Barboza, 2023/07/05