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[PATCH 01/12] tcg/tcg-op: Factor tcg_gen_hrev32_i32() out
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH 01/12] tcg/tcg-op: Factor tcg_gen_hrev32_i32() out |
Date: |
Tue, 22 Aug 2023 14:40:31 +0200 |
Byteswapping each halfword is a common operation, so
extract to a new tcg_gen_hrev32_i32() generic helper.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
docs/devel/tcg-ops.rst | 4 ++++
include/tcg/tcg-op-common.h | 1 +
tcg/tcg-op.c | 29 +++++++++++++++++++++++------
3 files changed, 28 insertions(+), 6 deletions(-)
diff --git a/docs/devel/tcg-ops.rst b/docs/devel/tcg-ops.rst
index 7ea6aba502..17965faa03 100644
--- a/docs/devel/tcg-ops.rst
+++ b/docs/devel/tcg-ops.rst
@@ -490,6 +490,10 @@ Misc
into 32-bit output *t0*. Depending on the host, this may be a simple
shift,
or may require additional canonicalization.
+ * - hrev32_i32 *t0*, *t1*
+
+ - | Byteswap each halfword within a 32-bit value.
+
* - hswap_i32/i64 *t0*, *t1*
- | Swap 16-bit halfwords within a 32/64-bit value.
diff --git a/include/tcg/tcg-op-common.h b/include/tcg/tcg-op-common.h
index be382bbf77..bb515dfd51 100644
--- a/include/tcg/tcg-op-common.h
+++ b/include/tcg/tcg-op-common.h
@@ -360,6 +360,7 @@ void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg);
void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg, int flags);
void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg);
void tcg_gen_hswap_i32(TCGv_i32 ret, TCGv_i32 arg);
+void tcg_gen_hrev32_i32(TCGv_i32 ret, TCGv_i32 arg);
void tcg_gen_smin_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
void tcg_gen_smax_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
void tcg_gen_umin_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index c436c5e263..b1b5d9b45b 100644
--- a/tcg/tcg-op.c
+++ b/tcg/tcg-op.c
@@ -1073,14 +1073,9 @@ void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg)
} else {
TCGv_i32 t0 = tcg_temp_ebb_new_i32();
TCGv_i32 t1 = tcg_temp_ebb_new_i32();
- TCGv_i32 t2 = tcg_constant_i32(0x00ff00ff);
/* arg = abcd */
- tcg_gen_shri_i32(t0, arg, 8); /* t0 = .abc */
- tcg_gen_and_i32(t1, arg, t2); /* t1 = .b.d */
- tcg_gen_and_i32(t0, t0, t2); /* t0 = .a.c */
- tcg_gen_shli_i32(t1, t1, 8); /* t1 = b.d. */
- tcg_gen_or_i32(ret, t0, t1); /* ret = badc */
+ tcg_gen_hrev32_i32(ret, arg); /* ret = badc */
tcg_gen_shri_i32(t0, ret, 16); /* t0 = ..ba */
tcg_gen_shli_i32(t1, ret, 16); /* t1 = dc.. */
@@ -1102,6 +1097,28 @@ void tcg_gen_hswap_i32(TCGv_i32 ret, TCGv_i32 arg)
tcg_gen_rotli_i32(ret, arg, 16);
}
+/*
+ * hswap_i32: Byteswap each halfword within a 32-bit value.
+ *
+ * Byte pattern: hswap_i32(abcd) -> badc
+ */
+void tcg_gen_hrev32_i32(TCGv_i32 ret, TCGv_i32 arg)
+{
+ TCGv_i32 mask = tcg_constant_i32(0x00ff00ff);
+ TCGv_i32 t0 = tcg_temp_ebb_new_i32();
+ TCGv_i32 t1 = tcg_temp_ebb_new_i32();
+
+ /* arg = abcd */
+ tcg_gen_shri_i32(t0, arg, 8); /* t0 = .abc */
+ tcg_gen_and_i32(t1, arg, mask); /* t1 = .b.d */
+ tcg_gen_and_i32(t0, t0, mask); /* t0 = .a.c */
+ tcg_gen_shli_i32(t1, t1, 8); /* t1 = b.d. */
+ tcg_gen_or_i32(ret, t0, t1); /* ret = badc */
+
+ tcg_temp_free_i32(t0);
+ tcg_temp_free_i32(t1);
+}
+
void tcg_gen_smin_i32(TCGv_i32 ret, TCGv_i32 a, TCGv_i32 b)
{
tcg_gen_movcond_i32(TCG_COND_LT, ret, a, b, a, b);
--
2.41.0
- [PATCH 00/12] tcg: Factor hrev{32,64}_{i32,i64,tl} out, Philippe Mathieu-Daudé, 2023/08/22
- [PATCH 01/12] tcg/tcg-op: Factor tcg_gen_hrev32_i32() out,
Philippe Mathieu-Daudé <=
- [PATCH 02/12] target/arm: Use generic hrev32_i32() in ARM REV16 and VREV16 opcodes, Philippe Mathieu-Daudé, 2023/08/22
- [PATCH 03/12] target/cris: Use generic hrev32_i32() in SWAPB opcode, Philippe Mathieu-Daudé, 2023/08/22
- [PATCH 04/12] target/rx: Use generic hrev32_i32() in REVW opcode, Philippe Mathieu-Daudé, 2023/08/22
- [PATCH 05/12] tcg/tcg-op: Factor tcg_gen_hrev64_i64() out, Philippe Mathieu-Daudé, 2023/08/22
- [PATCH 10/12] target/arm: Use generic hrev_i64() in Aarch64 REV16 opcode, Philippe Mathieu-Daudé, 2023/08/22
- [PATCH 09/12] tcg/tcg-op: Add tcg_gen_hrev32_i64() and tcg_gen_hrev_i64(), Philippe Mathieu-Daudé, 2023/08/22
- [PATCH 08/12] target/loongarch: Use generic hrev64_i64() in REVB.4H opcode, Philippe Mathieu-Daudé, 2023/08/22