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[PATCH v2 00/16] hw/microblaze: Allow running cross-endian vCPUs
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v2 00/16] hw/microblaze: Allow running cross-endian vCPUs |
Date: |
Thu, 7 Nov 2024 01:22:06 +0000 |
Since v1:
- Make device endianness configurable (Edgar)
- Convert more Xilinx devices
- Avoid preprocessor #if (Richard)
- Add R-b tags
Make machines endianness-agnostic, allowing to run a big-endian vCPU
on the little-endian 'qemu-system-microblazeel' binary, and a little
endian one on the big-endian 'qemu-system-microblaze' binary.
Tests added, following combinations covered:
- little-endian vCPU using little-endian binary (in-tree)
- little-endian vCPU using big-endian binary (new)
- big-endian vCPU using little-endian binary (new)
- big-endian vCPU using big-endian binary (in-tree)
To make a target endian-agnostic we need to remove the MO_TE uses.
In order to do that, we propagate the MemOp from earlier in the
call stack, or we extract it from the vCPU env (on MicroBlaze the
CPU endianness is exposed by the 'ENDI' bit).
Next step: Look at unifying binaries.
Please review,
Phil.
Philippe Mathieu-Daudé (16):
hw/microblaze: Restrict MemoryRegionOps are implemented as 32-bit
hw/microblaze: Propagate CPU endianness to microblaze_load_kernel()
hw/intc/xilinx_intc: Make device endianness configurable
RFC hw/net/xilinx_ethlite: Simplify by having configurable endianness
RFC hw/timer/xilinx_timer: Allow down to 8-bit memory access
hw/timer/xilinx_timer: Make device endianness configurable
hw/char/xilinx_uartlite: Make device endianness configurable
hw/ssi/xilinx_spi: Make device endianness configurable
hw/ssi/xilinx_spips: Make device endianness configurable
target/microblaze: Explode MO_TExx -> MO_TE | MO_xx
target/microblaze: Set MO_TE once in do_load() / do_store()
target/microblaze: Introduce mo_endian() helper
target/microblaze: Consider endianness while translating code
hw/microblaze: Support various endianness for s3adsp1800 machines
tests/functional: Explicit endianness of microblaze assets
tests/functional: Add microblaze cross-endianness tests
hw/microblaze/boot.h | 4 +-
include/hw/ssi/xilinx_spips.h | 1 +
target/microblaze/cpu.h | 7 +++
hw/arm/xilinx_zynq.c | 1 +
hw/arm/xlnx-zynqmp.c | 4 ++
hw/char/xilinx_uartlite.c | 40 +++++++++----
hw/intc/xilinx_intc.c | 59 +++++++++++++++----
hw/microblaze/boot.c | 8 +--
hw/microblaze/petalogix_ml605_mmu.c | 4 +-
hw/microblaze/petalogix_s3adsp1800_mmu.c | 59 ++++++++++++++++---
hw/microblaze/xlnx-zynqmp-pmu.c | 2 +-
hw/net/xilinx_ethlite.c | 52 ++++++++++++----
hw/ppc/virtex_ml507.c | 1 +
hw/ssi/xilinx_spi.c | 29 ++++++---
hw/ssi/xilinx_spips.c | 46 +++++++++++----
hw/timer/xilinx_timer.c | 42 ++++++++++---
target/microblaze/translate.c | 49 +++++++++------
.../functional/test_microblaze_s3adsp1800.py | 27 ++++++++-
.../test_microblazeel_s3adsp1800.py | 25 +++++++-
19 files changed, 358 insertions(+), 102 deletions(-)
--
2.45.2
- [PATCH v2 00/16] hw/microblaze: Allow running cross-endian vCPUs,
Philippe Mathieu-Daudé <=
- [PATCH v2 01/16] hw/microblaze: Restrict MemoryRegionOps are implemented as 32-bit, Philippe Mathieu-Daudé, 2024/11/06
- [PATCH v2 02/16] hw/microblaze: Propagate CPU endianness to microblaze_load_kernel(), Philippe Mathieu-Daudé, 2024/11/06
- [PATCH v2 03/16] hw/intc/xilinx_intc: Make device endianness configurable, Philippe Mathieu-Daudé, 2024/11/06
- [RFC PATCH v2 04/16] hw/net/xilinx_ethlite: Simplify by having configurable endianness, Philippe Mathieu-Daudé, 2024/11/06
- [RFC PATCH v2 05/16] hw/timer/xilinx_timer: Allow down to 8-bit memory access, Philippe Mathieu-Daudé, 2024/11/06
- [PATCH v2 06/16] hw/timer/xilinx_timer: Make device endianness configurable, Philippe Mathieu-Daudé, 2024/11/06
- [PATCH v2 07/16] hw/char/xilinx_uartlite: Make device endianness configurable, Philippe Mathieu-Daudé, 2024/11/06