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[Qemu-riscv] [PATCH v2 0/4] Miscellaneous patches from the RISC-V fork
From: |
Alistair Francis |
Subject: |
[Qemu-riscv] [PATCH v2 0/4] Miscellaneous patches from the RISC-V fork |
Date: |
Mon, 24 Jun 2019 16:42:27 -0700 |
This should be the last series bringing the patches from the RISC-V fork
into mainline QEMU.
v2:
- Add Wladimir's SOB line, after talking to them
- Allow c.andi to have a 0 immediate
Dayeol Lee (1):
target/riscv: Fix PMP range boundary address bug
Michael Clark (3):
disas/riscv: Disassemble reserved compressed encodings as illegal
disas/riscv: Fix `rdinstreth` constraint
target/riscv: Implement riscv_cpu_unassigned_access
disas/riscv.c | 51 ++++++++++++++++++++++++++-------------
target/riscv/cpu.c | 1 +
target/riscv/cpu.h | 2 ++
target/riscv/cpu_helper.c | 16 ++++++++++++
target/riscv/pmp.c | 2 +-
5 files changed, 54 insertions(+), 18 deletions(-)
--
2.22.0
- [Qemu-riscv] [PATCH v2 0/4] Miscellaneous patches from the RISC-V fork,
Alistair Francis <=
- [Qemu-riscv] [PATCH v2 2/4] disas/riscv: Disassemble reserved compressed encodings as illegal, Alistair Francis, 2019/06/24
- [Qemu-riscv] [PATCH v2 1/4] target/riscv: Fix PMP range boundary address bug, Alistair Francis, 2019/06/24
- [Qemu-riscv] [PATCH v2 3/4] disas/riscv: Fix `rdinstreth` constraint, Alistair Francis, 2019/06/24
- [Qemu-riscv] [PATCH v2 4/4] target/riscv: Implement riscv_cpu_unassigned_access, Alistair Francis, 2019/06/24
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v2 0/4] Miscellaneous patches from the RISC-V fork, no-reply, 2019/06/24
- Re: [Qemu-riscv] [PATCH v2 0/4] Miscellaneous patches from the RISC-V fork, Palmer Dabbelt, 2019/06/25