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From: | Palmer Dabbelt |
Subject: | Re: [Qemu-riscv] [Qemu-devel] [PATCH] atomic failures on qemu-system-riscv64 |
Date: | Wed, 26 Jun 2019 01:31:53 -0700 (PDT) |
On Wed, 26 Jun 2019 01:30:35 PDT (-0700), address@hidden wrote:
On 6/26/19 10:25 AM, Palmer Dabbelt wrote:You misunderstand. The code is exactly correct as-is. The alignment check happens implicitly as a part of the softmmu tlb resolution.Sorry, I thought you said it wasn't happening for linux-user? If it happens for both then we're good.Oh, that. No, there's no better way for linux-user. Though honestly, if we're going to fix this, it should be done in tcg/* rather than adding hacks within target/riscv.
OK, I'm fine punting on it for now. If I ever get time to fix it up then we'll attempt to do so genericly. Thanks!
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