[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL] A single RISC-V fixup
From: |
Palmer Dabbelt |
Subject: |
[PULL] A single RISC-V fixup |
Date: |
Thu, 5 Mar 2020 12:05:57 -0800 |
merged tag 'pull-target-arm-20200305'
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200305'
into staging (2020-03-05 16:47:37 +0000)
are available in the Git repository at:
address@hidden:palmer-dabbelt/qemu.git tags/riscv-for-master-5.0-sf4
for you to fetch changes up to fd990e86a7c99f5c99d430160243a3bcc64b0dea:
RISC-V: Add a missing "," in riscv_excp_names (2020-03-05 12:01:43 -0800)
----------------------------------------------------------------
A single RISC-V fixup
This is just a single patch, which fixes a bug found by Coverity.
----------------------------------------------------------------
Palmer Dabbelt (1):
RISC-V: Add a missing "," in riscv_excp_names
target/riscv/cpu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
- [PULL] A single RISC-V fixup,
Palmer Dabbelt <=