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qemu-riscv (thread)
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Last Modified: Mon May 31 2021 23:12:05 -0400
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[PATCH v1 0/3] hw/riscv: OpenTitan: Add support for the RISC-V timer
,
Alistair Francis
,
2021/05/31
[PATCH v1 1/3] hw/char/ibex_uart: Make the register layout private
,
Alistair Francis
,
2021/05/31
[PATCH v1 3/3] hw/riscv: OpenTitan: Connect the mtime and mtimecmp timer
,
Alistair Francis
,
2021/05/31
[PATCH v1 2/3] hw/timer: Initial commit of Ibex Timer
,
Alistair Francis
,
2021/05/31
[PATCH v1 1/1] target/riscv: Use target_ulong for the DisasContext misa
,
Alistair Francis
,
2021/05/31
Re: HSS Issue with GCC 10, Qemu Setup for microchip-icicle-kit
,
Bin Meng
,
2021/05/30
Re: HSS Issue with GCC 10, Qemu Setup for microchip-icicle-kit
,
Rahul Pathak
,
2021/05/31
Re: HSS Issue with GCC 10, Qemu Setup for microchip-icicle-kit
,
Rahul Pathak
,
2021/05/31
Re: HSS Issue with GCC 10, Qemu Setup for microchip-icicle-kit
,
Alistair Francis
,
2021/05/31
Re: HSS Issue with GCC 10, Qemu Setup for microchip-icicle-kit
,
Bin Meng
,
2021/05/31
Re: HSS Issue with GCC 10, Qemu Setup for microchip-icicle-kit
,
Rahul Pathak
,
2021/05/31
Re: HSS Issue with GCC 10, Qemu Setup for microchip-icicle-kit
,
Alistair Francis
,
2021/05/31
Re: [PATCH v2 1/8] hw/riscv: sifive_u: Switch to use qemu_fdt_setprop_string_array() helper
,
Bin Meng
,
2021/05/30
[PATCH v2 0/2] QOMify Sifive UART Model
,
Lukas Jünger
,
2021/05/30
[PATCH v2 1/2] hw/char: sifive_uart
,
Lukas Jünger
,
2021/05/30
Re: [PATCH v2 1/2] hw/char: sifive_uart
,
Bin Meng
,
2021/05/30
Re: [PATCH v2 1/2] hw/char: sifive_uart
,
Philippe Mathieu-Daudé
,
2021/05/31
[PATCH v2 2/2] hw/char: sifive_uart
,
Lukas Jünger
,
2021/05/30
Re: [PATCH v2 2/2] hw/char: sifive_uart
,
Bin Meng
,
2021/05/30
Re: [PATCH v2 2/2] hw/char: sifive_uart
,
Peter Maydell
,
2021/05/30
[PATCH 1/1] target/riscv: Fix vsip vsie CSR ops in M and HS mode
,
LIU Zhiwei
,
2021/05/27
Re: [PATCH 1/1] target/riscv: Fix vsip vsie CSR ops in M and HS mode
,
Alistair Francis
,
2021/05/27
Re: [PATCH 1/1] target/riscv: Fix vsip vsie CSR ops in M and HS mode
,
LIU Zhiwei
,
2021/05/27
[PATCH v9 0/6] RISC-V Pointer Masking implementation
,
Alexey Baturo
,
2021/05/26
[PATCH v9 1/6] [RISCV_PM] Add J-extension into RISC-V
,
Alexey Baturo
,
2021/05/26
[PATCH v9 2/6] [RISCV_PM] Support CSRs required for RISC-V PM extension except for the h-mode
,
Alexey Baturo
,
2021/05/26
[PATCH v9 4/6] [RISCV_PM] Support pointer masking for RISC-V for i/c/f/d/a types of instructions
,
Alexey Baturo
,
2021/05/26
[PATCH v9 6/6] [RISCV_PM] Allow experimental J-ext to be turned on
,
Alexey Baturo
,
2021/05/26
[PATCH v9 3/6] [RISCV_PM] Print new PM CSRs in QEMU logs
,
Alexey Baturo
,
2021/05/26
[PATCH v9 5/6] [RISCV_PM] Implement address masking functions required for RISC-V Pointer Masking extension
,
Alexey Baturo
,
2021/05/26
Re: [PATCH 08/38] target/riscv: SIMD 16-bit Compare Instructions
,
Palmer Dabbelt
,
2021/05/26
Re: [PATCH 08/38] target/riscv: SIMD 16-bit Compare Instructions
,
Palmer Dabbelt
,
2021/05/26
Re: [PATCH 07/38] target/riscv: SIMD 8-bit Shift Instructions
,
Palmer Dabbelt
,
2021/05/24
Re: [PATCH 05/38] target/riscv: 8-bit Addition & Subtraction Instruction
,
Palmer Dabbelt
,
2021/05/23
Re: [PATCH 05/38] target/riscv: 8-bit Addition & Subtraction Instruction
,
LIU Zhiwei
,
2021/05/26
Re: [PATCH 05/38] target/riscv: 8-bit Addition & Subtraction Instruction
,
Palmer Dabbelt
,
2021/05/26
[PATCH] target/riscv: hardwire bits in hideleg and hedeleg
,
Jose Martins
,
2021/05/22
Re: [PATCH] target/riscv: hardwire bits in hideleg and hedeleg
,
LIU Zhiwei
,
2021/05/25
Re: [PATCH] target/riscv: hardwire bits in hideleg and hedeleg
,
Jose Martins
,
2021/05/25
Re: [PATCH] target/riscv: hardwire bits in hideleg and hedeleg
,
LIU Zhiwei
,
2021/05/27
Re: [PATCH] target/riscv: hardwire bits in hideleg and hedeleg
,
LIU Zhiwei
,
2021/05/27
[PATCH v3] target/riscv: fix VS interrupts forwarding to HS
,
Jose Martins
,
2021/05/22
Re: [PATCH v3] target/riscv: fix VS interrupts forwarding to HS
,
LIU Zhiwei
,
2021/05/26
Re: [PATCH v3] target/riscv: fix VS interrupts forwarding to HS
,
Jose Martins
,
2021/05/26
Re: [PATCH v3] target/riscv: fix VS interrupts forwarding to HS
,
LIU Zhiwei
,
2021/05/27
Re: [PATCH v3] target/riscv: fix VS interrupts forwarding to HS
,
Alistair Francis
,
2021/05/27
Re: [PATCH v3] target/riscv: fix VS interrupts forwarding to HS
,
LIU Zhiwei
,
2021/05/27
[PATCH] target/riscv: Pass the same value to oprsz and maxsz.
,
LIU Zhiwei
,
2021/05/21
Re: [PATCH] target/riscv: Pass the same value to oprsz and maxsz.
,
Richard Henderson
,
2021/05/24
Re: [PATCH] target/riscv: Pass the same value to oprsz and maxsz.
,
Alistair Francis
,
2021/05/25
[PATCH v1 1/1] target/riscv/pmp: Add assert for ePMP operations
,
Alistair Francis
,
2021/05/20
Re: [PATCH v1 1/1] target/riscv/pmp: Add assert for ePMP operations
,
Bin Meng
,
2021/05/20
Re: [PATCH v1 1/1] target/riscv/pmp: Add assert for ePMP operations
,
LIU Zhiwei
,
2021/05/20
Re: [PATCH v1 1/1] target/riscv/pmp: Add assert for ePMP operations
,
Alistair Francis
,
2021/05/25
[PATCH v2] target/riscv: Dump CSR mscratch/sscratch/satp
,
Changbin Du
,
2021/05/19
Re: [PATCH v2] target/riscv: Dump CSR mscratch/sscratch/satp
,
Alistair Francis
,
2021/05/20
[PATCH v7 00/23] cpu: Introduce SysemuCPUOps structure
,
Philippe Mathieu-Daudé
,
2021/05/17
[PATCH v7 01/23] NOTFORMERGE target/arm: Restrict MTE code to softmmu
,
Philippe Mathieu-Daudé
,
2021/05/17
[PATCH v7 02/23] cpu: Restrict target cpu_do_transaction_failed() handlers to sysemu
,
Philippe Mathieu-Daudé
,
2021/05/17
Re: [PATCH v7 02/23] cpu: Restrict target cpu_do_transaction_failed() handlers to sysemu
,
Richard Henderson
,
2021/05/25
Re: [PATCH v7 02/23] cpu: Restrict target cpu_do_transaction_failed() handlers to sysemu
,
Philippe Mathieu-Daudé
,
2021/05/26
Re: [PATCH v7 02/23] cpu: Restrict target cpu_do_transaction_failed() handlers to sysemu
,
Richard Henderson
,
2021/05/26
[PATCH v7 03/23] cpu: Restrict target cpu_do_unaligned_access() handlers to sysemu
,
Philippe Mathieu-Daudé
,
2021/05/17
[PATCH v7 04/23] cpu: Remove duplicated 'sysemu/hw_accel.h' header
,
Philippe Mathieu-Daudé
,
2021/05/17
Re: [PATCH v7 04/23] cpu: Remove duplicated 'sysemu/hw_accel.h' header
,
Richard Henderson
,
2021/05/25
[PATCH v7 05/23] cpu: Split as cpu-common / cpu-sysemu
,
Philippe Mathieu-Daudé
,
2021/05/17
Re: [PATCH v7 05/23] cpu: Split as cpu-common / cpu-sysemu
,
Richard Henderson
,
2021/05/25
[PATCH v7 06/23] cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrs
,
Philippe Mathieu-Daudé
,
2021/05/17
[PATCH v7 07/23] cpu: Introduce cpu_virtio_is_big_endian()
,
Philippe Mathieu-Daudé
,
2021/05/17
[PATCH v7 08/23] cpu: Directly use cpu_write_elf*() fallback handlers in place
,
Philippe Mathieu-Daudé
,
2021/05/17
[PATCH v7 09/23] cpu: Directly use get_paging_enabled() fallback handlers in place
,
Philippe Mathieu-Daudé
,
2021/05/17
[PATCH v7 10/23] cpu: Directly use get_memory_mapping() fallback handlers in place
,
Philippe Mathieu-Daudé
,
2021/05/17
[PATCH v7 11/23] cpu: Assert DeviceClass::vmsd is NULL on user emulation
,
Philippe Mathieu-Daudé
,
2021/05/17
[PATCH v7 12/23] cpu: Rename CPUClass vmsd -> legacy_vmsd
,
Philippe Mathieu-Daudé
,
2021/05/17
[PATCH v7 13/23] cpu: Move AVR target vmsd field from CPUClass to DeviceClass
,
Philippe Mathieu-Daudé
,
2021/05/17
Re: [PATCH v7 13/23] cpu: Move AVR target vmsd field from CPUClass to DeviceClass
,
Richard Henderson
,
2021/05/25
[PATCH v7 14/23] cpu: Introduce SysemuCPUOps structure
,
Philippe Mathieu-Daudé
,
2021/05/17
[PATCH v7 15/23] cpu: Move CPUClass::vmsd to SysemuCPUOps
,
Philippe Mathieu-Daudé
,
2021/05/17
[PATCH v7 16/23] cpu: Move CPUClass::virtio_is_big_endian to SysemuCPUOps
,
Philippe Mathieu-Daudé
,
2021/05/17
[PATCH v7 17/23] cpu: Move CPUClass::get_crash_info to SysemuCPUOps
,
Philippe Mathieu-Daudé
,
2021/05/17
[PATCH v7 19/23] cpu: Move CPUClass::asidx_from_attrs to SysemuCPUOps
,
Philippe Mathieu-Daudé
,
2021/05/17
[PATCH v7 18/23] cpu: Move CPUClass::write_elf* to SysemuCPUOps
,
Philippe Mathieu-Daudé
,
2021/05/17
[PATCH v7 20/23] cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOps
,
Philippe Mathieu-Daudé
,
2021/05/17
[PATCH v7 21/23] cpu: Move CPUClass::get_memory_mapping to SysemuCPUOps
,
Philippe Mathieu-Daudé
,
2021/05/17
[PATCH v7 22/23] cpu: Move CPUClass::get_paging_enabled to SysemuCPUOps
,
Philippe Mathieu-Daudé
,
2021/05/17
[PATCH v7 23/23] cpu: Restrict "hw/core/sysemu-cpu-ops.h" to target/cpu.c
,
Philippe Mathieu-Daudé
,
2021/05/17
Re: [PATCH v7 00/23] cpu: Introduce SysemuCPUOps structure
,
Philippe Mathieu-Daudé
,
2021/05/25
Re: [PATCH v7 00/23] cpu: Introduce SysemuCPUOps structure
,
Richard Henderson
,
2021/05/26
[PATCH] target/riscv: Remove obsolete 'CPU unmigratable' comment
,
Philippe Mathieu-Daudé
,
2021/05/17
Re: [PATCH] target/riscv: Remove obsolete 'CPU unmigratable' comment
,
Bin Meng
,
2021/05/17
Re: [PATCH] target/riscv: Remove obsolete 'CPU unmigratable' comment
,
Richard Henderson
,
2021/05/17
Re: [PATCH] target/riscv: Remove obsolete 'CPU unmigratable' comment
,
Alistair Francis
,
2021/05/17
Re: [PATCH] target/riscv: Remove obsolete 'CPU unmigratable' comment
,
Alistair Francis
,
2021/05/18
Re: [PATCH v6 08/18] cpu/{avr, lm32, moxie}: Set DeviceClass vmsd field (not CPUClass one)
,
Philippe Mathieu-Daudé
,
2021/05/17
[PATCH v2] target/riscv: Do not include 'pmp.h' in user emulation
,
Philippe Mathieu-Daudé
,
2021/05/16
Re: [PATCH v2] target/riscv: Do not include 'pmp.h' in user emulation
,
Philippe Mathieu-Daudé
,
2021/05/16
Re: [PATCH v2] target/riscv: Do not include 'pmp.h' in user emulation
,
Alistair Francis
,
2021/05/16
Re: [PATCH v2] target/riscv: Do not include 'pmp.h' in user emulation
,
Bin Meng
,
2021/05/16
Re: [PATCH v2] target/riscv: Do not include 'pmp.h' in user emulation
,
Alistair Francis
,
2021/05/18
[PATCH v2 00/12] hw: Various Kconfig fixes
,
Philippe Mathieu-Daudé
,
2021/05/15
[PATCH v2 01/12] hw/mem/nvdimm: Use Kconfig 'imply' instead of 'depends on'
,
Philippe Mathieu-Daudé
,
2021/05/15
Re: [PATCH v2 01/12] hw/mem/nvdimm: Use Kconfig 'imply' instead of 'depends on'
,
Bin Meng
,
2021/05/16
[PATCH v2 02/12] hw/ide/Kconfig: Add missing dependency PCI -> IDE_QDEV
,
Philippe Mathieu-Daudé
,
2021/05/15
Re: [PATCH v2 02/12] hw/ide/Kconfig: Add missing dependency PCI -> IDE_QDEV
,
John Snow
,
2021/05/18
[PATCH v2 03/12] hw/arm/Kconfig: Add missing dependency NPCM7XX -> SMBUS
,
Philippe Mathieu-Daudé
,
2021/05/15
[PATCH v2 04/12] hw/arm/Kconfig: Remove unused DS1338 symbol from i.MX25 PDK Board
,
Philippe Mathieu-Daudé
,
2021/05/15
[PATCH v2 05/12] hw/arm/Kconfig: Add missing SDHCI symbol to FSL_IMX25
,
Philippe Mathieu-Daudé
,
2021/05/15
[PATCH v2 06/12] hw/riscv/Kconfig: Add missing dependency MICROCHIP_PFSOC -> SERIAL
,
Philippe Mathieu-Daudé
,
2021/05/15
Re: [PATCH v2 06/12] hw/riscv/Kconfig: Add missing dependency MICROCHIP_PFSOC -> SERIAL
,
Alistair Francis
,
2021/05/16
Re: [PATCH v2 06/12] hw/riscv/Kconfig: Add missing dependency MICROCHIP_PFSOC -> SERIAL
,
Bin Meng
,
2021/05/16
[PATCH v2 07/12] hw/riscv/Kconfig: Restrict NUMA to Virt & Spike machines
,
Philippe Mathieu-Daudé
,
2021/05/15
Re: [PATCH v2 07/12] hw/riscv/Kconfig: Restrict NUMA to Virt & Spike machines
,
Alistair Francis
,
2021/05/16
[PATCH v2 08/12] hw/ppc/Kconfig: Add missing dependency E500 -> DS1338 RTC
,
Philippe Mathieu-Daudé
,
2021/05/15
[PATCH v2 09/12] hw/pci-host/Kconfig: Add missing dependency MV64361 -> I8259
,
Philippe Mathieu-Daudé
,
2021/05/15
Re: [PATCH v2 09/12] hw/pci-host/Kconfig: Add missing dependency MV64361 -> I8259
,
BALATON Zoltan
,
2021/05/15
Re: [PATCH v2 09/12] hw/pci-host/Kconfig: Add missing dependency MV64361 -> I8259
,
Bin Meng
,
2021/05/16
Re: [PATCH v2 09/12] hw/pci-host/Kconfig: Add missing dependency MV64361 -> I8259
,
Philippe Mathieu-Daudé
,
2021/05/17
Re: [PATCH v2 09/12] hw/pci-host/Kconfig: Add missing dependency MV64361 -> I8259
,
David Gibson
,
2021/05/16
[PATCH v2 10/12] hw/isa/vt82c686: Add missing Kconfig dependencies (build error)
,
Philippe Mathieu-Daudé
,
2021/05/15
Re: [PATCH v2 10/12] hw/isa/vt82c686: Add missing Kconfig dependencies (build error)
,
BALATON Zoltan
,
2021/05/15
Re: [PATCH v2 10/12] hw/isa/vt82c686: Add missing Kconfig dependencies (build error)
,
Bin Meng
,
2021/05/16
[PATCH v2 11/12] hw/isa/vt82c686: Add missing Kconfig dependency (runtime error)
,
Philippe Mathieu-Daudé
,
2021/05/15
Re: [PATCH v2 11/12] hw/isa/vt82c686: Add missing Kconfig dependency (runtime error)
,
BALATON Zoltan
,
2021/05/15
Re: [PATCH v2 11/12] hw/isa/vt82c686: Add missing Kconfig dependency (runtime error)
,
Bin Meng
,
2021/05/16
[PATCH v2 12/12] hw/ppc/Kconfig: Add dependency PEGASOS2 -> ATI_VGA
,
Philippe Mathieu-Daudé
,
2021/05/15
Re: [PATCH v2 12/12] hw/ppc/Kconfig: Add dependency PEGASOS2 -> ATI_VGA
,
BALATON Zoltan
,
2021/05/15
Re: [PATCH v2 12/12] hw/ppc/Kconfig: Add dependency PEGASOS2 -> ATI_VGA
,
Philippe Mathieu-Daudé
,
2021/05/15
Re: [PATCH v2 12/12] hw/ppc/Kconfig: Add dependency PEGASOS2 -> ATI_VGA
,
Bin Meng
,
2021/05/16
Re: [PATCH v2 12/12] hw/ppc/Kconfig: Add dependency PEGASOS2 -> ATI_VGA
,
David Gibson
,
2021/05/16
Re: [PATCH v2 00/12] hw: Various Kconfig fixes
,
Eduardo Habkost
,
2021/05/17
Re: [PATCH v2 00/12] hw: Various Kconfig fixes
,
Eduardo Habkost
,
2021/05/17
Re: [PATCH v2 00/12] hw: Various Kconfig fixes
,
Philippe Mathieu-Daudé
,
2021/05/18
[PATCH 0/4] AIA local interrupt CSR support
,
Anup Patel
,
2021/05/14
[PATCH 1/4] target/riscv: Add defines for AIA local interrupt CSRs
,
Anup Patel
,
2021/05/14
[PATCH 2/4] target/riscv: Add CPU feature for AIA CSRs
,
Anup Patel
,
2021/05/14
[PATCH 3/4] target/riscv: Implement AIA local interrupt CSRs
,
Anup Patel
,
2021/05/14
[PATCH 4/4] hw/riscv: virt: Use AIA INTC compatible string when available
,
Anup Patel
,
2021/05/14
[PATCH] target/riscv: Remove unnecessary riscv_*_names[] declaration
,
Bin Meng
,
2021/05/14
Re: [PATCH] target/riscv: Remove unnecessary riscv_*_names[] declaration
,
Philippe Mathieu-Daudé
,
2021/05/14
Re: [PATCH] target/riscv: Remove unnecessary riscv_*_names[] declaration
,
Alistair Francis
,
2021/05/16
Re: [PATCH] target/riscv: Remove unnecessary riscv_*_names[] declaration
,
Alistair Francis
,
2021/05/20
[PATCH 06/10] hw/riscv/Kconfig: Add missing dependency MICROCHIP_PFSOC -> SERIAL
,
Philippe Mathieu-Daudé
,
2021/05/13
Re: [PATCH 06/10] hw/riscv/Kconfig: Add missing dependency MICROCHIP_PFSOC -> SERIAL
,
Bin Meng
,
2021/05/13
Re: [PATCH 06/10] hw/riscv/Kconfig: Add missing dependency MICROCHIP_PFSOC -> SERIAL
,
Philippe Mathieu-Daudé
,
2021/05/14
[PATCH 07/10] hw/riscv/Kconfig: Restrict NUMA to Virt & Spike machines
,
Philippe Mathieu-Daudé
,
2021/05/13
Re: [PATCH 07/10] hw/riscv/Kconfig: Restrict NUMA to Virt & Spike machines
,
Bin Meng
,
2021/05/13
Re: [PATCH] target/riscv: Dump CSR mscratch/sscratch/satp
,
Alistair Francis
,
2021/05/12
Re: [PATCH] target/riscv: Dump CSR mscratch/sscratch/satp
,
Bin Meng
,
2021/05/13
Re: [PATCH v8 5/6] [RISCV_PM] Implement address masking functions required for RISC-V Pointer Masking extension
,
Alistair Francis
,
2021/05/12
Re: [PATCH RESEND v8 2/6] [RISCV_PM] Support CSRs required for RISC-V PM extension except for the h-mode
,
Alistair Francis
,
2021/05/12
[PATCH V2 0/2] Proposing custom CSR handling logic
,
Ruinland Chuan-Tzu Tsai
,
2021/05/11
[PATCH V2 1/2] Adding premliminary support for custom CSR handling mechanism
,
Ruinland Chuan-Tzu Tsai
,
2021/05/11
Re: [PATCH V2 1/2] Adding premliminary support for custom CSR handling mechanism
,
Alistair Francis
,
2021/05/12
Re: [PATCH V2 1/2] Adding premliminary support for custom CSR handling mechanism
,
Alistair Francis
,
2021/05/12
[PATCH V2 2/2] Adding custom Andes CSR table.
,
Ruinland Chuan-Tzu Tsai
,
2021/05/11
Re: [PATCH V2 0/2] Proposing custom CSR handling logic
,
Alistair Francis
,
2021/05/12
Re: [PATCH V2 0/2] Proposing custom CSR handling logic
,
Bin Meng
,
2021/05/12
Re: [PATCH V2 0/2] Proposing custom CSR handling logic
,
Alistair Francis
,
2021/05/12
[PATCH 0/1] Proposing custom CSR handling logic
,
Ruinland Chuan-Tzu Tsai
,
2021/05/11
[PATCH 1/1] Adding premliminary support for custom CSR handling mechanism
,
Ruinland Chuan-Tzu Tsai
,
2021/05/11
[RFC PATCH 0/5] RISC-V:support Nuclei FPGA Evaluation Kit
,
wangjunqiang
,
2021/05/07
[RFC PATCH 1/5] target/riscv: Add Nuclei CSR and Update interrupt handling
,
wangjunqiang
,
2021/05/07
Re: [RFC PATCH 1/5] target/riscv: Add Nuclei CSR and Update interrupt handling
,
Alistair Francis
,
2021/05/09
Re: [RFC PATCH 1/5] target/riscv: Add Nuclei CSR and Update interrupt handling
,
Wang Junqiang
,
2021/05/10
Re: [RFC PATCH 1/5] target/riscv: Add Nuclei CSR and Update interrupt handling
,
Alistair Francis
,
2021/05/10
Re: [RFC PATCH 1/5] target/riscv: Add Nuclei CSR and Update interrupt handling
,
Wang Junqiang
,
2021/05/11
Re: [RFC PATCH 1/5] target/riscv: Add Nuclei CSR and Update interrupt handling
,
Alistair Francis
,
2021/05/11
[RFC PATCH 3/5] hw/intc: Add Nuclei Systimer
,
wangjunqiang
,
2021/05/07
[RFC PATCH 2/5] hw/intc: Add Nuclei ECLIC device
,
wangjunqiang
,
2021/05/07
Re: [RFC PATCH 2/5] hw/intc: Add Nuclei ECLIC device
,
Alistair Francis
,
2021/05/09
Re: [RFC PATCH 2/5] hw/intc: Add Nuclei ECLIC device
,
Bin Meng
,
2021/05/09
Re: [RFC PATCH 2/5] hw/intc: Add Nuclei ECLIC device
,
Bin Meng
,
2021/05/10
Re: [RFC PATCH 2/5] hw/intc: Add Nuclei ECLIC device
,
Wang Junqiang
,
2021/05/10
[RFC PATCH 4/5] hw/char: Add Nuclei Uart
,
wangjunqiang
,
2021/05/07
[RFC PATCH 5/5] Nuclei FPGA Evaluation Kit MCU Machine
,
wangjunqiang
,
2021/05/07
Re: [RFC PATCH 0/5] RISC-V:support Nuclei FPGA Evaluation Kit
,
no-reply
,
2021/05/07
target.xml
,
Schwarz, Konrad
,
2021/05/07
RE: [PATCH RFC v5 07/12] hw/riscv: PLIC update external interrupt by KVM when kvm enabled
,
Jiangyifei
,
2021/05/06
Re: [PATCH v2] target/riscv: fix wfi exception behavior
,
Alistair Francis
,
2021/05/05
Re: [PATCH] docs/system: riscv: Include shakti_c machine documentation
,
Alistair Francis
,
2021/05/05
Re: [PATCH] docs/system: riscv: Include shakti_c machine documentation
,
Alistair Francis
,
2021/05/05
[PATCH v6 00/17] support subsets of bitmanip extension
,
frank . chang
,
2021/05/05
[PATCH v6 01/17] target/riscv: reformat @sh format encoding for B-extension
,
frank . chang
,
2021/05/05
[PATCH v6 02/17] target/riscv: rvb: count leading/trailing zeros
,
frank . chang
,
2021/05/05
Re: [PATCH v6 02/17] target/riscv: rvb: count leading/trailing zeros
,
Alistair Francis
,
2021/05/05
[PATCH v6 04/17] target/riscv: rvb: logic-with-negate
,
frank . chang
,
2021/05/05
[PATCH v6 05/17] target/riscv: rvb: pack two words into one register
,
frank . chang
,
2021/05/05
[PATCH v6 03/17] target/riscv: rvb: count bits set
,
frank . chang
,
2021/05/05
[PATCH v6 06/17] target/riscv: rvb: min/max instructions
,
frank . chang
,
2021/05/05
[PATCH v6 07/17] target/riscv: rvb: sign-extend instructions
,
frank . chang
,
2021/05/05
[PATCH v6 08/17] target/riscv: add gen_shifti() and gen_shiftiw() helper functions
,
frank . chang
,
2021/05/05
Re: [PATCH v6 08/17] target/riscv: add gen_shifti() and gen_shiftiw() helper functions
,
Alistair Francis
,
2021/05/10
[PATCH v6 09/17] target/riscv: rvb: single-bit instructions
,
frank . chang
,
2021/05/05
Re: [PATCH v6 09/17] target/riscv: rvb: single-bit instructions
,
Alistair Francis
,
2021/05/10
[PATCH v6 10/17] target/riscv: rvb: shift ones
,
frank . chang
,
2021/05/05
Re: [PATCH v6 10/17] target/riscv: rvb: shift ones
,
Alistair Francis
,
2021/05/10
[PATCH v6 11/17] target/riscv: rvb: rotate (left/right)
,
frank . chang
,
2021/05/05
Re: [PATCH v6 11/17] target/riscv: rvb: rotate (left/right)
,
Alistair Francis
,
2021/05/20
[PATCH v6 12/17] target/riscv: rvb: generalized reverse
,
frank . chang
,
2021/05/05
[PATCH v6 13/17] target/riscv: rvb: generalized or-combine
,
frank . chang
,
2021/05/05
[PATCH v6 14/17] target/riscv: rvb: address calculation
,
frank . chang
,
2021/05/05
[PATCH v6 15/17] target/riscv: rvb: add/shift with prefix zero-extend
,
frank . chang
,
2021/05/05
[PATCH v6 16/17] target/riscv: rvb: support and turn on B-extension from command line
,
frank . chang
,
2021/05/05
[PATCH v6 17/17] target/riscv: rvb: add b-ext version cpu option
,
frank . chang
,
2021/05/05
Re: [PATCH v6 17/17] target/riscv: rvb: add b-ext version cpu option
,
Alistair Francis
,
2021/05/27
Re: [PATCH v6 00/17] support subsets of bitmanip extension
,
Alistair Francis
,
2021/05/27
[PATCH 0/2] QOMify Sifive UART model
,
Lukas Jünger
,
2021/05/04
[PATCH 2/2] QOMify sifive_uart model
,
Lukas Jünger
,
2021/05/04
Re: [PATCH 2/2] QOMify sifive_uart model
,
Philippe Mathieu-Daudé
,
2021/05/11
Re: [PATCH 2/2] QOMify sifive_uart model
,
Lukas Jünger
,
2021/05/16
Re: [PATCH 2/2] QOMify sifive_uart model
,
Luc Michel
,
2021/05/11
[PATCH 1/2] Consistent function names for sifive uart read and write function
,
Lukas Jünger
,
2021/05/04
Re: [PATCH 1/2] Consistent function names for sifive uart read and write function
,
Alistair Francis
,
2021/05/05
Re: [PATCH 1/2] Consistent function names for sifive uart read and write function
,
Bin Meng
,
2021/05/11
Re: [PATCH 1/2] Consistent function names for sifive uart read and write function
,
Luc Michel
,
2021/05/11
[PATCH v1 1/1] docs/system: Move the RISC-V -bios information to removed
,
Alistair Francis
,
2021/05/03
Re: [PATCH v1 1/1] docs/system: Move the RISC-V -bios information to removed
,
Bin Meng
,
2021/05/03
[PATCH v2] target/riscv: fix VS interrupts forwarding to HS
,
Jose Martins
,
2021/05/03
Re: [PATCH v2] target/riscv: fix VS interrupts forwarding to HS
,
Alistair Francis
,
2021/05/12
Re: [PATCH v2 5/8] docs/system/riscv: Correct the indentation level of supported devices
,
Alistair Francis
,
2021/05/02
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