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Re: [PATCH qemu v6 07/10] target/riscv: rvv: Add mask agnostic for vecto
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From: |
Alistair Francis |
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Subject: |
Re: [PATCH qemu v6 07/10] target/riscv: rvv: Add mask agnostic for vector floating-point instructions |
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Date: |
Thu, 21 Jul 2022 10:21:13 +1000 |
On Mon, Jun 20, 2022 at 4:53 PM ~eopxd <eopxd@git.sr.ht> wrote:
>
> From: Yueh-Ting (eop) Chen <eop.chen@sifive.com>
>
> Signed-off-by: eop Chen <eop.chen@sifive.com>
> Reviewed-by: Frank Chang <frank.chang@sifive.com>
> Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/riscv/insn_trans/trans_rvv.c.inc | 12 ++++++++++++
> target/riscv/vector_helper.c | 26 +++++++++++++++++++++++++
> 2 files changed, 38 insertions(+)
>
> diff --git a/target/riscv/insn_trans/trans_rvv.c.inc
> b/target/riscv/insn_trans/trans_rvv.c.inc
> index e6aa5295a1..8ce3d28603 100644
> --- a/target/riscv/insn_trans/trans_rvv.c.inc
> +++ b/target/riscv/insn_trans/trans_rvv.c.inc
> @@ -2361,6 +2361,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmrr *a)
> \
> data = FIELD_DP32(data, VDATA, VTA, s->vta); \
> data = \
> FIELD_DP32(data, VDATA, VTA_ALL_1S, s->cfg_vta_all_1s);\
> + data = FIELD_DP32(data, VDATA, VMA, s->vma); \
> tcg_gen_gvec_4_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), \
> vreg_ofs(s, a->rs1), \
> vreg_ofs(s, a->rs2), cpu_env, \
> @@ -2446,6 +2447,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmrr *a)
> \
> data = FIELD_DP32(data, VDATA, VTA, s->vta); \
> data = FIELD_DP32(data, VDATA, VTA_ALL_1S, \
> s->cfg_vta_all_1s); \
> + data = FIELD_DP32(data, VDATA, VMA, s->vma); \
> return opfvf_trans(a->rd, a->rs1, a->rs2, data, \
> fns[s->sew - 1], s); \
> } \
> @@ -2485,6 +2487,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmrr *a)
> \
> data = FIELD_DP32(data, VDATA, VM, a->vm); \
> data = FIELD_DP32(data, VDATA, LMUL, s->lmul); \
> data = FIELD_DP32(data, VDATA, VTA, s->vta); \
> + data = FIELD_DP32(data, VDATA, VMA, s->vma); \
> tcg_gen_gvec_4_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), \
> vreg_ofs(s, a->rs1), \
> vreg_ofs(s, a->rs2), cpu_env, \
> @@ -2525,6 +2528,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmrr *a)
> \
> data = FIELD_DP32(data, VDATA, VM, a->vm); \
> data = FIELD_DP32(data, VDATA, LMUL, s->lmul); \
> data = FIELD_DP32(data, VDATA, VTA, s->vta); \
> + data = FIELD_DP32(data, VDATA, VMA, s->vma); \
> return opfvf_trans(a->rd, a->rs1, a->rs2, data, \
> fns[s->sew - 1], s); \
> } \
> @@ -2562,6 +2566,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmrr *a)
> \
> data = FIELD_DP32(data, VDATA, VM, a->vm); \
> data = FIELD_DP32(data, VDATA, LMUL, s->lmul); \
> data = FIELD_DP32(data, VDATA, VTA, s->vta); \
> + data = FIELD_DP32(data, VDATA, VMA, s->vma); \
> tcg_gen_gvec_4_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), \
> vreg_ofs(s, a->rs1), \
> vreg_ofs(s, a->rs2), cpu_env, \
> @@ -2602,6 +2607,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmrr *a)
> \
> data = FIELD_DP32(data, VDATA, VM, a->vm); \
> data = FIELD_DP32(data, VDATA, LMUL, s->lmul); \
> data = FIELD_DP32(data, VDATA, VTA, s->vta); \
> + data = FIELD_DP32(data, VDATA, VMA, s->vma); \
> return opfvf_trans(a->rd, a->rs1, a->rs2, data, \
> fns[s->sew - 1], s); \
> } \
> @@ -2686,6 +2692,7 @@ static bool do_opfv(DisasContext *s, arg_rmr *a,
> data = FIELD_DP32(data, VDATA, VM, a->vm);
> data = FIELD_DP32(data, VDATA, LMUL, s->lmul);
> data = FIELD_DP32(data, VDATA, VTA, s->vta);
> + data = FIELD_DP32(data, VDATA, VMA, s->vma);
> tcg_gen_gvec_3_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0),
> vreg_ofs(s, a->rs2), cpu_env,
> s->cfg_ptr->vlen / 8,
> @@ -2790,6 +2797,7 @@ static bool trans_vfmv_v_f(DisasContext *s,
> arg_vfmv_v_f *a)
> TCGv_i32 desc;
> uint32_t data = FIELD_DP32(0, VDATA, LMUL, s->lmul);
> data = FIELD_DP32(data, VDATA, VTA, s->vta);
> + data = FIELD_DP32(data, VDATA, VMA, s->vma);
> static gen_helper_vmv_vx * const fns[3] = {
> gen_helper_vmv_v_x_h,
> gen_helper_vmv_v_x_w,
> @@ -2891,6 +2899,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmr *a)
> \
> data = FIELD_DP32(data, VDATA, VM, a->vm); \
> data = FIELD_DP32(data, VDATA, LMUL, s->lmul); \
> data = FIELD_DP32(data, VDATA, VTA, s->vta); \
> + data = FIELD_DP32(data, VDATA, VMA, s->vma); \
> tcg_gen_gvec_3_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), \
> vreg_ofs(s, a->rs2), cpu_env, \
> s->cfg_ptr->vlen / 8, \
> @@ -2944,6 +2953,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmr *a)
> \
> data = FIELD_DP32(data, VDATA, VM, a->vm); \
> data = FIELD_DP32(data, VDATA, LMUL, s->lmul); \
> data = FIELD_DP32(data, VDATA, VTA, s->vta); \
> + data = FIELD_DP32(data, VDATA, VMA, s->vma); \
> tcg_gen_gvec_3_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), \
> vreg_ofs(s, a->rs2), cpu_env, \
> s->cfg_ptr->vlen / 8, \
> @@ -3012,6 +3022,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmr *a)
> \
> data = FIELD_DP32(data, VDATA, VM, a->vm); \
> data = FIELD_DP32(data, VDATA, LMUL, s->lmul); \
> data = FIELD_DP32(data, VDATA, VTA, s->vta); \
> + data = FIELD_DP32(data, VDATA, VMA, s->vma); \
> tcg_gen_gvec_3_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), \
> vreg_ofs(s, a->rs2), cpu_env, \
> s->cfg_ptr->vlen / 8, \
> @@ -3067,6 +3078,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmr *a)
> \
> data = FIELD_DP32(data, VDATA, VM, a->vm); \
> data = FIELD_DP32(data, VDATA, LMUL, s->lmul); \
> data = FIELD_DP32(data, VDATA, VTA, s->vta); \
> + data = FIELD_DP32(data, VDATA, VMA, s->vma); \
> tcg_gen_gvec_3_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), \
> vreg_ofs(s, a->rs2), cpu_env, \
> s->cfg_ptr->vlen / 8, \
> diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
> index 597fa9c752..315742c6b8 100644
> --- a/target/riscv/vector_helper.c
> +++ b/target/riscv/vector_helper.c
> @@ -3051,10 +3051,14 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1,
> \
> uint32_t total_elems = \
> vext_get_total_elems(env, desc, ESZ); \
> uint32_t vta = vext_vta(desc); \
> + uint32_t vma = vext_vma(desc); \
> uint32_t i; \
> \
> for (i = env->vstart; i < vl; i++) { \
> if (!vm && !vext_elem_mask(v0, i)) { \
> + /* set masked-off elements to 1s */ \
> + vext_set_elems_1s(vd, vma, i * ESZ, \
> + (i + 1) * ESZ); \
> continue; \
> } \
> do_##NAME(vd, vs1, vs2, i, env); \
> @@ -3090,10 +3094,14 @@ void HELPER(NAME)(void *vd, void *v0, uint64_t s1,
> \
> uint32_t total_elems = \
> vext_get_total_elems(env, desc, ESZ); \
> uint32_t vta = vext_vta(desc); \
> + uint32_t vma = vext_vma(desc); \
> uint32_t i; \
> \
> for (i = env->vstart; i < vl; i++) { \
> if (!vm && !vext_elem_mask(v0, i)) { \
> + /* set masked-off elements to 1s */ \
> + vext_set_elems_1s(vd, vma, i * ESZ, \
> + (i + 1) * ESZ); \
> continue; \
> } \
> do_##NAME(vd, s1, vs2, i, env); \
> @@ -3665,6 +3673,7 @@ void HELPER(NAME)(void *vd, void *v0, void *vs2, \
> uint32_t total_elems = \
> vext_get_total_elems(env, desc, ESZ); \
> uint32_t vta = vext_vta(desc); \
> + uint32_t vma = vext_vma(desc); \
> uint32_t i; \
> \
> if (vl == 0) { \
> @@ -3672,6 +3681,9 @@ void HELPER(NAME)(void *vd, void *v0, void *vs2, \
> } \
> for (i = env->vstart; i < vl; i++) { \
> if (!vm && !vext_elem_mask(v0, i)) { \
> + /* set masked-off elements to 1s */ \
> + vext_set_elems_1s(vd, vma, i * ESZ, \
> + (i + 1) * ESZ); \
> continue; \
> } \
> do_##NAME(vd, vs2, i, env); \
> @@ -4182,12 +4194,17 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void
> *vs2, \
> uint32_t vl = env->vl; \
> uint32_t total_elems = env_archcpu(env)->cfg.vlen; \
> uint32_t vta_all_1s = vext_vta_all_1s(desc); \
> + uint32_t vma = vext_vma(desc); \
> uint32_t i; \
> \
> for (i = env->vstart; i < vl; i++) { \
> ETYPE s1 = *((ETYPE *)vs1 + H(i)); \
> ETYPE s2 = *((ETYPE *)vs2 + H(i)); \
> if (!vm && !vext_elem_mask(v0, i)) { \
> + /* set masked-off elements to 1s */ \
> + if (vma) { \
> + vext_set_elem_mask(vd, i, 1); \
> + } \
> continue; \
> } \
> vext_set_elem_mask(vd, i, \
> @@ -4215,11 +4232,16 @@ void HELPER(NAME)(void *vd, void *v0, uint64_t s1,
> void *vs2, \
> uint32_t vl = env->vl; \
> uint32_t total_elems = env_archcpu(env)->cfg.vlen; \
> uint32_t vta_all_1s = vext_vta_all_1s(desc); \
> + uint32_t vma = vext_vma(desc); \
> uint32_t i; \
> \
> for (i = env->vstart; i < vl; i++) { \
> ETYPE s2 = *((ETYPE *)vs2 + H(i)); \
> if (!vm && !vext_elem_mask(v0, i)) { \
> + /* set masked-off elements to 1s */ \
> + if (vma) { \
> + vext_set_elem_mask(vd, i, 1); \
> + } \
> continue; \
> } \
> vext_set_elem_mask(vd, i, \
> @@ -4342,10 +4364,14 @@ void HELPER(NAME)(void *vd, void *v0, void *vs2,
> \
> uint32_t total_elems = \
> vext_get_total_elems(env, desc, ESZ); \
> uint32_t vta = vext_vta(desc); \
> + uint32_t vma = vext_vma(desc); \
> uint32_t i; \
> \
> for (i = env->vstart; i < vl; i++) { \
> if (!vm && !vext_elem_mask(v0, i)) { \
> + /* set masked-off elements to 1s */ \
> + vext_set_elems_1s(vd, vma, i * ESZ, \
> + (i + 1) * ESZ); \
> continue; \
> } \
> do_##NAME(vd, vs2, i); \
> --
> 2.34.2
>
>
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Alistair Francis <=