qemu-riscv (thread)

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qemu-riscv (thread)

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Last Modified: Wed Dec 04 2024 01:50:07 -0500
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Re: [PATCH-for-10.0 v2 01/13] hw/pci: Do not declare PCIBus::flags mask as enum, Thomas Huth, 2024/12/04
Re: [PATCH for-10.0 0/9] target/riscv: add 'sha' support, Alistair Francis, 2024/12/03
Re: [PATCH for-10.0 9/9] target/riscv/tcg: add sha, Alistair Francis, 2024/12/03
Re: [PATCH for-10.0 8/9] target/riscv: add shgatpa, Alistair Francis, 2024/12/03
Re: [PATCH for-10.0 7/9] target/riscv: add shvsatpa, Alistair Francis, 2024/12/03
Re: [PATCH for-10.0 6/9] target/riscv: add shvstvecd, Alistair Francis, 2024/12/03
Re: [PATCH for-10.0 5/9] target/riscv: add shtvala, Alistair Francis, 2024/12/03
Re: [PATCH for-10.0 4/9] target/riscv: add shvstvala, Alistair Francis, 2024/12/03
Re: [PATCH for-10.0 3/9] target/riscv: add shcounterenw, Alistair Francis, 2024/12/03
[PATCH RESEND v1] target/riscv: add support for RV64 Xiangshan Nanhu CPU, MollyChen, 2024/12/03
[PATCH v1] Add a CPU entry for the RV64 XiangShan NANHU CPU which supports single-core and dual-core configurations. More details can be found at https://docs.xiangshan.cc/zh-cn/latest/integration/overview, MollyChen, 2024/12/03
Re: Host riscv disas is broken, Alistair Francis, 2024/12/03
[PATCH v4 00/11] Add RISC-V Counter delegation ISA extension support, Atish Patra, 2024/12/03
- [PATCH v4 01/11] target/riscv: Add properties for Indirect CSR Access extension, Atish Patra, 2024/12/03
- [PATCH v4 02/11] target/riscv: Decouple AIA processing from xiselect and xireg, Atish Patra, 2024/12/03
- [PATCH v4 04/11] target/riscv: Support generic CSR indirect access, Atish Patra, 2024/12/03
- [PATCH v4 03/11] target/riscv: Enable S*stateen bits for AIA, Atish Patra, 2024/12/03
- [PATCH v4 05/11] target/riscv: Add properties for counter delegation ISA extensions, Atish Patra, 2024/12/03
- [PATCH v4 06/11] target/riscv: Add counter delegation definitions, Atish Patra, 2024/12/03
- [PATCH v4 07/11] target/riscv: Add select value range check for counter delegation, Atish Patra, 2024/12/03
- [PATCH v4 08/11] target/riscv: Add counter delegation/configuration support, Atish Patra, 2024/12/03
- [PATCH v4 09/11] target/riscv: Invoke pmu init after feature enable, Atish Patra, 2024/12/03
- [PATCH v4 10/11] target/riscv: Add implied rule for counter delegation extensions, Atish Patra, 2024/12/03
- [PATCH v4 11/11] target/riscv: Add configuration for S[m|s]csrind, Smcdeleg/Ssccfg, Atish Patra, 2024/12/03
[PATCH 0/2] target/riscv: Include missing headers in '*internals.h', Philippe Mathieu-Daudé, 2024/12/03
- [PATCH 1/2] target/riscv: Include missing headers in 'vector_internals.h', Philippe Mathieu-Daudé, 2024/12/03
  - Re: [PATCH 1/2] target/riscv: Include missing headers in 'vector_internals.h', Daniel Henrique Barboza, 2024/12/03
  - Re: [PATCH 1/2] target/riscv: Include missing headers in 'vector_internals.h', Alistair Francis, 2024/12/03
- [PATCH 2/2] target/riscv: Include missing headers in 'internals.h', Philippe Mathieu-Daudé, 2024/12/03
  - Re: [PATCH 2/2] target/riscv: Include missing headers in 'internals.h', Daniel Henrique Barboza, 2024/12/03
  - Re: [PATCH 2/2] target/riscv: Include missing headers in 'internals.h', Alistair Francis, 2024/12/03
- Re: [PATCH 0/2] target/riscv: Include missing headers in '*internals.h', Alistair Francis, 2024/12/03
Re: [PATCH for-10.0 2/9] target/riscv: add ssstateen, Andrew Jones, 2024/12/03
- Re: [PATCH for-10.0 2/9] target/riscv: add ssstateen, Alistair Francis, 2024/12/03
Re: [PATCH] binfmt: Don't consider riscv{32,64} part of the same family, Philippe Mathieu-Daudé, 2024/12/03
- Re: [PATCH] binfmt: Don't consider riscv{32, 64} part of the same family, Andrea Bolognani, 2024/12/03
- Re: [PATCH] binfmt: Don't consider riscv{32,64} part of the same family, Daniel P . Berrangé, 2024/12/03
  - Re: [PATCH] binfmt: Don't consider riscv{32, 64} part of the same family, Peter Maydell, 2024/12/03
    - Re: [PATCH] binfmt: Don't consider riscv{32,64} part of the same family, Richard Henderson, 2024/12/03
Re: [PATCH v4 0/3] Support 64-bit address of initrd, Alistair Francis, 2024/12/03
Re: [PATCH v4 3/3] hw/riscv: Add the checking if DTB overlaps to kernel or initrd, Alistair Francis, 2024/12/03
Re: [PATCH v4 2/3] hw/riscv: Add a new struct RISCVBootInfo, Alistair Francis, 2024/12/03
Re: [PATCH v4 1/3] hw/riscv: Support to load DTB after 3GB memory on 64-bit system., Alistair Francis, 2024/12/03
Re: [PATCH-for-10.0 0/3] hw/char/riscv_htif: Remove tswap64() calls, Alistair Francis, 2024/12/03
Re: [PATCH-for-10.0 3/3] hw/char/riscv_htif: Clarify MemoryRegionOps expect 32-bit accesses, Alistair Francis, 2024/12/03
Re: [PATCH-for-10.0 2/3] hw/char/riscv_htif: Explicit little-endian implementation, Alistair Francis, 2024/12/03
Re: [PATCH-for-10.0 1/3] MAINTAINERS: Cover RISC-V HTIF interface, Alistair Francis, 2024/12/02
Re: [PATCH for-9.2] target/riscv: Avoid bad shift in riscv_cpu_do_interrupt(), Alistair Francis, 2024/12/02
- Re: [PATCH for-9.2] target/riscv: Avoid bad shift in riscv_cpu_do_interrupt(), Alistair Francis, 2024/12/03
  - Re: [PATCH for-9.2] target/riscv: Avoid bad shift in riscv_cpu_do_interrupt(), Philippe Mathieu-Daudé, 2024/12/03
[PATCH v5 0/6] Introduce svukte ISA extension, Fea.Wang, 2024/12/02
- [PATCH v5 1/6] target/riscv: Add svukte extension capability variable, Fea.Wang, 2024/12/02
- [PATCH v5 2/6] target/riscv: Support senvcfg[UKTE] bit when svukte extension is enabled, Fea.Wang, 2024/12/02
- [PATCH v5 3/6] target/riscv: Support hstatus[HUKTE] bit when svukte extension is enabled, Fea.Wang, 2024/12/02
- [PATCH v5 4/6] target/riscv: Check memory access to meet svukte rule, Fea.Wang, 2024/12/02
- [PATCH v5 6/6] target/riscv: Check svukte is not enabled in RV32, Fea.Wang, 2024/12/02
  - Re: [PATCH v5 6/6] target/riscv: Check svukte is not enabled in RV32, Alistair Francis, 2024/12/03
- [PATCH v5 5/6] target/riscv: Expose svukte ISA extension, Fea.Wang, 2024/12/02
- Re: [PATCH v5 0/6] Introduce svukte ISA extension, Alistair Francis, 2024/12/03
Re: [PATCH v3 04/11] target/riscv: Support generic CSR indirect access, Atish Kumar Patra, 2024/12/02
Re: [PATCH v3 08/11] target/riscv: Add counter delegation/configuration support, Atish Kumar Patra, 2024/12/02
- Re: [PATCH v3 08/11] target/riscv: Add counter delegation/configuration support, Daniel Henrique Barboza, 2024/12/02
  - Re: [PATCH v3 08/11] target/riscv: Add counter delegation/configuration support, Atish Kumar Patra, 2024/12/02
[RFC PATCH v3 09/11] target/riscv: call plugin trap callbacks, Julian Ganz, 2024/12/02
- Re: [RFC PATCH v3 09/11] target/riscv: call plugin trap callbacks, Alistair Francis, 2024/12/02
RE: [PATCH v6 0/3] Upgrade ACPI SPCR table to support SPCR table revision 4 format, JeeHeng Sia, 2024/12/01
- Re: [PATCH v6 0/3] Upgrade ACPI SPCR table to support SPCR table revision 4 format, Alistair Francis, 2024/12/03

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