On Thu, 5 Jul 2018 13:25:38 -0400
"Jason J. Herne" <address@hidden> wrote:
From: "Jason J. Herne" <address@hidden>
Add struct for format-0 ccws. Support executing format-0 channel
+ */
+ if (irb->scsw.cstat != 0x00 && irb->scsw.cstat != 0x40) {
+ return true;
+ }
+ return irb->scsw.dstat != 0xc;
+}
+
+/* Executes a channel program at a given subchannel. The request to run the
+ * channel program is sent to the subchannel, we then wait for the interrupt
+ * singaling completion of the I/O operation(s) perfomed by the channel
+ * program. Lastly we verify that the i/o operation completed without error and
+ * that the interrupt we received was for the subchannel used to run the
+ * channel program.
Finally, real interrupts instead of polling in the s390-ccw bios,
nice :)
+ *
+ * Note: This function assumes it is running in an environment where no other
+ * cpus are generating or receiving I/O interrupts. So either run it in a
+ * single-cpu environment or make sure all other cpus are not doing I/O and
+ * have I/O interrupts masked off.
+ */
+int do_cio(SubChannelId schid, uint32_t ccw_addr, int fmt)
+{
+ Ccw0 *this_ccw, *prev_ccw;
+ CmdOrb orb = {};
+ Irb irb = {};
+ int rc;
+
+ IPL_assert(fmt == 0 || fmt == 1, "Invalid ccw format");
+
+ /* ccw_addr must be <= 24 bits and point to at least one whole ccw. */
+ if (fmt == 0) {
+ IPL_assert(ccw_addr <= 0xFFFFFF - 8, "Invalid ccw address");
+ }
+
+ orb.fmt = fmt ;
+ orb.pfch = 1; /* QEMU's cio implementation requires prefetch */
+ orb.c64 = 1; /* QEMU's cio implementation requires 64-bit idaws */
+ orb.lpm = 0xFF; /* All paths allowed */
+ orb.cpa = ccw_addr;
+
+ rc = ssch(schid, &orb);
+ if (rc) {
+ print_int("ssch failed with rc=", rc);
+ return rc;
Are you doing anything like retrying on cc 1/2? It's probably fine to
give up on cc 3.