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Re: [qemu-s390x] [PATCH v5 07/17] spapr: Expose the name of the interrup
From: |
David Gibson |
Subject: |
Re: [qemu-s390x] [PATCH v5 07/17] spapr: Expose the name of the interrupt controller node |
Date: |
Wed, 20 Feb 2019 14:24:49 +1100 |
User-agent: |
Mutt/1.10.1 (2018-07-13) |
On Tue, Feb 19, 2019 at 06:18:08PM +0100, Greg Kurz wrote:
> This will be needed by PHB hotplug in order to access the "phandle"
> property of the interrupt controller node.
>
> Reviewed-by: Cédric Le Goater <address@hidden>
> Signed-off-by: Greg Kurz <address@hidden>
> Reviewed-by: David Gibson <address@hidden>
Applied, thanks.
> ---
> hw/intc/spapr_xive.c | 9 ++++-----
> hw/intc/xics_spapr.c | 2 +-
> hw/ppc/spapr_irq.c | 21 ++++++++++++++++++++-
> include/hw/ppc/spapr_irq.h | 1 +
> include/hw/ppc/spapr_xive.h | 3 +++
> include/hw/ppc/xics_spapr.h | 2 ++
> 6 files changed, 31 insertions(+), 7 deletions(-)
>
> diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c
> index 290a290e43a5..06e3c9fdbfeb 100644
> --- a/hw/intc/spapr_xive.c
> +++ b/hw/intc/spapr_xive.c
> @@ -317,6 +317,9 @@ static void spapr_xive_realize(DeviceState *dev, Error
> **errp)
> /* Map all regions */
> spapr_xive_map_mmio(xive);
>
> + xive->nodename = g_strdup_printf("address@hidden" PRIx64,
> + xive->tm_base + XIVE_TM_USER_PAGE * (1 <<
> TM_SHIFT));
> +
> qemu_register_reset(spapr_xive_reset, dev);
> }
>
> @@ -1448,7 +1451,6 @@ void spapr_dt_xive(sPAPRMachineState *spapr, uint32_t
> nr_servers, void *fdt,
> cpu_to_be32(7), /* start */
> cpu_to_be32(0xf8), /* count */
> };
> - gchar *nodename;
>
> /* Thread Interrupt Management Area : User (ring 3) and OS (ring 2) */
> timas[0] = cpu_to_be64(xive->tm_base +
> @@ -1458,10 +1460,7 @@ void spapr_dt_xive(sPAPRMachineState *spapr, uint32_t
> nr_servers, void *fdt,
> XIVE_TM_OS_PAGE * (1ull << TM_SHIFT));
> timas[3] = cpu_to_be64(1ull << TM_SHIFT);
>
> - nodename = g_strdup_printf("address@hidden" PRIx64,
> - xive->tm_base + XIVE_TM_USER_PAGE * (1 <<
> TM_SHIFT));
> - _FDT(node = fdt_add_subnode(fdt, 0, nodename));
> - g_free(nodename);
> + _FDT(node = fdt_add_subnode(fdt, 0, xive->nodename));
>
> _FDT(fdt_setprop_string(fdt, node, "device_type", "power-ivpe"));
> _FDT(fdt_setprop(fdt, node, "reg", timas, sizeof(timas)));
> diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c
> index e2d8b3818336..53bda6661b2a 100644
> --- a/hw/intc/xics_spapr.c
> +++ b/hw/intc/xics_spapr.c
> @@ -254,7 +254,7 @@ void spapr_dt_xics(sPAPRMachineState *spapr, uint32_t
> nr_servers, void *fdt,
> };
> int node;
>
> - _FDT(node = fdt_add_subnode(fdt, 0, "interrupt-controller"));
> + _FDT(node = fdt_add_subnode(fdt, 0, XICS_NODENAME));
>
> _FDT(fdt_setprop_string(fdt, node, "device_type",
> "PowerPC-External-Interrupt-Presentation"));
> diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c
> index 4297eed600f9..359761494c6e 100644
> --- a/hw/ppc/spapr_irq.c
> +++ b/hw/ppc/spapr_irq.c
> @@ -230,6 +230,11 @@ static void spapr_irq_reset_xics(sPAPRMachineState
> *spapr, Error **errp)
> /* TODO: create the KVM XICS device */
> }
>
> +static const char *spapr_irq_get_nodename_xics(sPAPRMachineState *spapr)
> +{
> + return XICS_NODENAME;
> +}
> +
> #define SPAPR_IRQ_XICS_NR_IRQS 0x1000
> #define SPAPR_IRQ_XICS_NR_MSIS \
> (XICS_IRQ_BASE + SPAPR_IRQ_XICS_NR_IRQS - SPAPR_IRQ_MSI)
> @@ -249,6 +254,7 @@ sPAPRIrq spapr_irq_xics = {
> .post_load = spapr_irq_post_load_xics,
> .reset = spapr_irq_reset_xics,
> .set_irq = spapr_irq_set_irq_xics,
> + .get_nodename = spapr_irq_get_nodename_xics,
> };
>
> /*
> @@ -384,6 +390,11 @@ static void spapr_irq_set_irq_xive(void *opaque, int
> srcno, int val)
> xive_source_set_irq(&spapr->xive->source, srcno, val);
> }
>
> +static const char *spapr_irq_get_nodename_xive(sPAPRMachineState *spapr)
> +{
> + return spapr->xive->nodename;
> +}
> +
> /*
> * XIVE uses the full IRQ number space. Set it to 8K to be compatible
> * with XICS.
> @@ -407,6 +418,7 @@ sPAPRIrq spapr_irq_xive = {
> .post_load = spapr_irq_post_load_xive,
> .reset = spapr_irq_reset_xive,
> .set_irq = spapr_irq_set_irq_xive,
> + .get_nodename = spapr_irq_get_nodename_xive,
> };
>
> /*
> @@ -541,6 +553,11 @@ static void spapr_irq_set_irq_dual(void *opaque, int
> srcno, int val)
> spapr_irq_current(spapr)->set_irq(spapr, srcno, val);
> }
>
> +static const char *spapr_irq_get_nodename_dual(sPAPRMachineState *spapr)
> +{
> + return spapr_irq_current(spapr)->get_nodename(spapr);
> +}
> +
> /*
> * Define values in sync with the XIVE and XICS backend
> */
> @@ -561,7 +578,8 @@ sPAPRIrq spapr_irq_dual = {
> .cpu_intc_create = spapr_irq_cpu_intc_create_dual,
> .post_load = spapr_irq_post_load_dual,
> .reset = spapr_irq_reset_dual,
> - .set_irq = spapr_irq_set_irq_dual
> + .set_irq = spapr_irq_set_irq_dual,
> + .get_nodename = spapr_irq_get_nodename_dual,
> };
>
> /*
> @@ -691,4 +709,5 @@ sPAPRIrq spapr_irq_xics_legacy = {
> .cpu_intc_create = spapr_irq_cpu_intc_create_xics,
> .post_load = spapr_irq_post_load_xics,
> .set_irq = spapr_irq_set_irq_xics,
> + .get_nodename = spapr_irq_get_nodename_xics,
> };
> diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h
> index 488511c3d890..8bf1a7291966 100644
> --- a/include/hw/ppc/spapr_irq.h
> +++ b/include/hw/ppc/spapr_irq.h
> @@ -47,6 +47,7 @@ typedef struct sPAPRIrq {
> int (*post_load)(sPAPRMachineState *spapr, int version_id);
> void (*reset)(sPAPRMachineState *spapr, Error **errp);
> void (*set_irq)(void *opaque, int srcno, int val);
> + const char *(*get_nodename)(sPAPRMachineState *spapr);
> } sPAPRIrq;
>
> extern sPAPRIrq spapr_irq_xics;
> diff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h
> index 9bec9192e4a0..2d31f24e3bfe 100644
> --- a/include/hw/ppc/spapr_xive.h
> +++ b/include/hw/ppc/spapr_xive.h
> @@ -26,6 +26,9 @@ typedef struct sPAPRXive {
> XiveENDSource end_source;
> hwaddr end_base;
>
> + /* DT */
> + gchar *nodename;
> +
> /* Routing table */
> XiveEAS *eat;
> uint32_t nr_irqs;
> diff --git a/include/hw/ppc/xics_spapr.h b/include/hw/ppc/xics_spapr.h
> index b1ab27d022cf..b8d924baf437 100644
> --- a/include/hw/ppc/xics_spapr.h
> +++ b/include/hw/ppc/xics_spapr.h
> @@ -29,6 +29,8 @@
>
> #include "hw/ppc/spapr.h"
>
> +#define XICS_NODENAME "interrupt-controller"
> +
> void spapr_dt_xics(sPAPRMachineState *spapr, uint32_t nr_servers, void *fdt,
> uint32_t phandle);
> int xics_kvm_init(sPAPRMachineState *spapr, Error **errp);
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- [qemu-s390x] [PATCH v5 02/17] spapr: Generate FDT fragment for LMBs at configure connector time, (continued)
- [qemu-s390x] [PATCH v5 06/17] xics: Write source state to KVM at claim time, Greg Kurz, 2019/02/19
- [qemu-s390x] [PATCH v5 04/17] spapr/pci: Generate FDT fragment at configure connector time, Greg Kurz, 2019/02/19
- [qemu-s390x] [PATCH v5 07/17] spapr: Expose the name of the interrupt controller node, Greg Kurz, 2019/02/19
- Re: [qemu-s390x] [PATCH v5 07/17] spapr: Expose the name of the interrupt controller node,
David Gibson <=
- [qemu-s390x] [PATCH v5 08/17] spapr_irq: Expose the phandle of the interrupt controller, Greg Kurz, 2019/02/19
- [qemu-s390x] [PATCH v5 11/17] spapr: populate PHB DRC entries for root DT node, Greg Kurz, 2019/02/19
- [qemu-s390x] [PATCH v5 09/17] spapr_pci: add PHB unrealize, Greg Kurz, 2019/02/19
- [qemu-s390x] [PATCH v5 12/17] spapr_events: add support for phb hotplug events, Greg Kurz, 2019/02/19
- [qemu-s390x] [PATCH v5 10/17] spapr: create DR connectors for PHBs, Greg Kurz, 2019/02/19