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Re: [qemu-s390x] [PATCH v1 3/3] s390x/tcg: Save vregs to extended mchk s
From: |
Cornelia Huck |
Subject: |
Re: [qemu-s390x] [PATCH v1 3/3] s390x/tcg: Save vregs to extended mchk save area |
Date: |
Fri, 22 Feb 2019 11:20:53 +0100 |
On Fri, 22 Feb 2019 09:11:53 +0100
David Hildenbrand <address@hidden> wrote:
> If we have vector registers and the designation is not zero, we have
> to try to write the vector registers. If the designation is zero or
> if storing fails, we must not indicate validity. s390_build_validity_mcic()
> automatically already sets validity if the vector instruction facility
> is installed.
>
> As long as we don't support the guarded-storage facility, the alignemnt &
> size of the area is always 1024 bytes.
s/alignemnt & size/alignment and size/
Can change while applying.
>
> Signed-off-by: David Hildenbrand <address@hidden>
> ---
> target/s390x/excp_helper.c | 46 ++++++++++++++++++++++++++++++++++++--
> target/s390x/internal.h | 4 +++-
> 2 files changed, 47 insertions(+), 3 deletions(-)
- [qemu-s390x] [PATCH v1 0/3] s390x: SIGP + IRQ preparations for TCG vector register support, David Hildenbrand, 2019/02/22
- [qemu-s390x] [PATCH v1 1/3] s390x: Use cpu_to_be64 in SIGP STORE ADDITIONAL STATUS, David Hildenbrand, 2019/02/22
- [qemu-s390x] [PATCH v1 2/3] s390x: use a QEMU-style typedef + name for SIGP save area struct, David Hildenbrand, 2019/02/22
- [qemu-s390x] [PATCH v1 3/3] s390x/tcg: Save vregs to extended mchk save area, David Hildenbrand, 2019/02/22
- Re: [qemu-s390x] [PATCH v1 0/3] s390x: SIGP + IRQ preparations for TCG vector register support, Cornelia Huck, 2019/02/22
- Re: [qemu-s390x] [PATCH v1 0/3] s390x: SIGP + IRQ preparations for TCG vector register support, Cornelia Huck, 2019/02/25