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From: | Richard Henderson |
Subject: | Re: [qemu-s390x] [Qemu-devel] [PATCH v1 02/33] s390x/tcg: Check vector register instructions at central point |
Date: | Tue, 26 Feb 2019 10:26:43 -0800 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.4.0 |
On 2/26/19 3:38 AM, David Hildenbrand wrote: > Check them at a central point. We'll use a new instruction flag to > flag all vector instructions (IF_VEC) and handle it very similar to > AFP, whereby we use another unused position in the PSW mask to store > the state of vector register enablement per translation block. > > Signed-off-by: David Hildenbrand <address@hidden> > --- > target/s390x/cpu.h | 7 +++++++ > target/s390x/translate.c | 12 ++++++++++++ > 2 files changed, 19 insertions(+) Reviewed-by: Richard Henderson <address@hidden> r~
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