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Re: [PATCH v4] target/s390x: Implement the MVPG condition-code-option bi


From: Cornelia Huck
Subject: Re: [PATCH v4] target/s390x: Implement the MVPG condition-code-option bit
Date: Thu, 11 Mar 2021 11:21:10 +0100

On Wed, 10 Mar 2021 21:49:22 +0100
David Hildenbrand <david@redhat.com> wrote:

> > Am 09.03.2021 um 22:05 schrieb Thomas Huth <thuth@redhat.com>:
> > 
> > On 04/03/2021 09.10, David Hildenbrand wrote:  
> >>> On 03.03.21 22:36, Richard Henderson wrote:
> >>> On 3/3/21 1:22 PM, David Hildenbrand wrote:  
> >>>>   
> >>>>> Am 03.03.2021 um 22:19 schrieb Richard Henderson 
> >>>>> <richard.henderson@linaro.org>:
> >>>>> 
> >>>>> On 3/3/21 1:11 PM, David Hildenbrand wrote:  
> >>>>>> MMIO on s390x? :)  
> >>>>> 
> >>>>> hw/s390x/s390-pci-bus.c, memory_region_init_io*().
> >>>>>   
> >>>> 
> >>>> ... part of system address space where a CPU could stumble over it?  
> >>> 
> >>> Impossible to tell within 3 layers of object wrappers.  :-(
> >>> I suppose I have no idea how "pci" was hacked onto s390x.  
> >> You've used the right words to describe "pci" (!) on s390x.
> >> IIRC, there is no MMIO: configuration space accesses etc. are performed 
> >> using special access instructions - which will "emulate" the MMIO access 
> >> performed on other archs via simple read/write instructions.
> >> Ordinary instructions (e.g., mvpg) that operate on the system address 
> >> space should never stumble over MMIO regions - because that concept does 
> >> not exist on s390x.  
> > 
> > Sorry, guys, you've lost me here ... is there now something left to do for 
> > this patch or is it good as it is?  
> 
> I think that check for invalid TLB should be replaced by a check against host 
> == NULL.
> 

Just a reminder that softfreeze is on Tuesday next week, and I'd like
to send a pull request by Monday. So a v5 should arrive soon to make it
:)




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