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[PULL 31/37] target/s390x: Improve s390_cpu_dump_state vs cc_op
From: |
Cornelia Huck |
Subject: |
[PULL 31/37] target/s390x: Improve s390_cpu_dump_state vs cc_op |
Date: |
Mon, 21 Jun 2021 11:58:36 +0200 |
From: Richard Henderson <richard.henderson@linaro.org>
Use s390_cpu_get_psw_mask so that we print the correct
architectural value of psw.mask. Do not print cc_op
unless tcg_enabled.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Tested-by: jonathan.albrecht <jonathan.albrecht@linux.vnet.ibm.com>
Tested-by: <ruixin.bao@ibm.com>
Message-Id: <20210615030744.1252385-4-richard.henderson@linaro.org>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
---
target/s390x/helper.c | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/target/s390x/helper.c b/target/s390x/helper.c
index 559fc3573fe3..1445b74451f4 100644
--- a/target/s390x/helper.c
+++ b/target/s390x/helper.c
@@ -338,12 +338,14 @@ void s390_cpu_dump_state(CPUState *cs, FILE *f, int flags)
CPUS390XState *env = &cpu->env;
int i;
- if (env->cc_op > 3) {
- qemu_fprintf(f, "PSW=mask %016" PRIx64 " addr %016" PRIx64 " cc
%15s\n",
- env->psw.mask, env->psw.addr, cc_name(env->cc_op));
+ qemu_fprintf(f, "PSW=mask %016" PRIx64 " addr %016" PRIx64,
+ s390_cpu_get_psw_mask(env), env->psw.addr);
+ if (!tcg_enabled()) {
+ qemu_fprintf(f, "\n");
+ } else if (env->cc_op > 3) {
+ qemu_fprintf(f, " cc %15s\n", cc_name(env->cc_op));
} else {
- qemu_fprintf(f, "PSW=mask %016" PRIx64 " addr %016" PRIx64 " cc
%02x\n",
- env->psw.mask, env->psw.addr, env->cc_op);
+ qemu_fprintf(f, " cc %02x\n", env->cc_op);
}
for (i = 0; i < 16; i++) {
--
2.31.1
- [PULL 22/37] s390x/tcg: Implement 32/128 bit for VECTOR FP MULTIPLY AND (ADD|SUBTRACT), (continued)
- [PULL 22/37] s390x/tcg: Implement 32/128 bit for VECTOR FP MULTIPLY AND (ADD|SUBTRACT), Cornelia Huck, 2021/06/21
- [PULL 23/37] s390x/tcg: Implement VECTOR FP NEGATIVE MULTIPLY AND (ADD|SUBTRACT), Cornelia Huck, 2021/06/21
- [PULL 20/37] s390x/tcg: Implement 32/128 bit for VECTOR FP PERFORM SIGN OPERATION, Cornelia Huck, 2021/06/21
- [PULL 24/37] s390x/tcg: Implement VECTOR FP (MAXIMUM|MINIMUM), Cornelia Huck, 2021/06/21
- [PULL 26/37] s390x/tcg: We support Vector enhancements facility, Cornelia Huck, 2021/06/21
- [PULL 25/37] linux-user: elf: s390x: Prepare for Vector enhancements facility, Cornelia Huck, 2021/06/21
- [PULL 27/37] s390x/cpumodel: Bump up QEMU model to a stripped-down IBM z14 GA2, Cornelia Huck, 2021/06/21
- [PULL 28/37] configure: Check whether we can compile the s390-ccw bios with -msoft-float, Cornelia Huck, 2021/06/21
- [PULL 29/37] target/s390x: Expose load_psw and get_psw_mask to cpu.h, Cornelia Huck, 2021/06/21
- [PULL 30/37] target/s390x: Do not modify cpu state in s390_cpu_get_psw_mask, Cornelia Huck, 2021/06/21
- [PULL 31/37] target/s390x: Improve s390_cpu_dump_state vs cc_op,
Cornelia Huck <=
- [PULL 32/37] target/s390x: Use s390_cpu_{set_psw, get_psw_mask} in gdbstub, Cornelia Huck, 2021/06/21
- [PULL 33/37] linux-user/s390x: Save and restore psw.mask properly, Cornelia Huck, 2021/06/21
- [PULL 34/37] s390x/css: Introduce an ESW struct, Cornelia Huck, 2021/06/21
- [PULL 35/37] s390x/css: Split out the IRB sense data, Cornelia Huck, 2021/06/21
- [PULL 37/37] s390x/css: Add passthrough IRB, Cornelia Huck, 2021/06/21
- [PULL 36/37] s390x/css: Refactor IRB construction, Cornelia Huck, 2021/06/21
- Re: [PULL 00/37] s390x update, no-reply, 2021/06/21
- Re: [PULL 00/37] s390x update, Peter Maydell, 2021/06/22