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Re: [PATCH v3 05/11] target/s390x: vxeh2: vector shift double by bit
From: |
David Hildenbrand |
Subject: |
Re: [PATCH v3 05/11] target/s390x: vxeh2: vector shift double by bit |
Date: |
Mon, 21 Mar 2022 12:23:38 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.6.2 |
On 08.03.22 02:53, Richard Henderson wrote:
> From: David Miller <dmiller423@gmail.com>
>
> Signed-off-by: David Miller <dmiller423@gmail.com>
> Message-Id: <20220307020327.3003-4-dmiller423@gmail.com>
> [rth: Split out of larger patch.]
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/s390x/tcg/translate_vx.c.inc | 47 ++++++++++++++++++++++++++---
> target/s390x/tcg/insn-data.def | 6 +++-
> 2 files changed, 48 insertions(+), 5 deletions(-)
>
> diff --git a/target/s390x/tcg/translate_vx.c.inc
> b/target/s390x/tcg/translate_vx.c.inc
> index 967f6213d8..a5283ef2f8 100644
> --- a/target/s390x/tcg/translate_vx.c.inc
> +++ b/target/s390x/tcg/translate_vx.c.inc
> @@ -2056,11 +2056,19 @@ static DisasJumpType op_vsrl(DisasContext *s,
> DisasOps *o)
> gen_helper_gvec_vsrl_ve2);
> }
>
> -static DisasJumpType op_vsldb(DisasContext *s, DisasOps *o)
> +static DisasJumpType op_vsld(DisasContext *s, DisasOps *o)
> {
> - const uint8_t i4 = get_field(s, i4) & 0xf;
> - const int left_shift = (i4 & 7) * 8;
> - const int right_shift = 64 - left_shift;
> + const bool byte = s->insn->data;
> + const uint8_t mask = byte ? 15 : 7;
> + const uint8_t mul = byte ? 8 : 1;
> + const uint8_t i4 = get_field(s, i4);
> + const int right_shift = 64 - (i4 & 7) * mul;
> +
> + if (i4 & ~mask) {
> + gen_program_exception(s, PGM_SPECIFICATION);
> + return DISAS_NORETURN;
> + }
> +
> TCGv_i64 t0 = tcg_temp_new_i64();
> TCGv_i64 t1 = tcg_temp_new_i64();
> TCGv_i64 t2 = tcg_temp_new_i64();
TCGv_i64 t0, t1, t2;
if (i4 & ~mask) {
...
}
t0 = tcg_temp_new_i64();
t1 = tcg_temp_new_i64();
t2 = tcg_temp_new_i64();
> @@ -2074,8 +2082,39 @@ static DisasJumpType op_vsldb(DisasContext *s,
> DisasOps *o)
> read_vec_element_i64(t1, get_field(s, v3), 0, ES_64);
> read_vec_element_i64(t2, get_field(s, v3), 1, ES_64);
> }
> +
> tcg_gen_extract2_i64(t0, t1, t0, right_shift);
> tcg_gen_extract2_i64(t1, t2, t1, right_shift);
> +
> + write_vec_element_i64(t0, get_field(s, v1), 0, ES_64);
> + write_vec_element_i64(t1, get_field(s, v1), 1, ES_64);
> +
> + tcg_temp_free(t0);
> + tcg_temp_free(t1);
> + tcg_temp_free(t2);
> + return DISAS_NEXT;
> +}
> +
> +static DisasJumpType op_vsrd(DisasContext *s, DisasOps *o)
> +{
> + const uint8_t i4 = get_field(s, i4);
> +
> + if (i4 & ~7) {
> + gen_program_exception(s, PGM_SPECIFICATION);
> + return DISAS_NORETURN;
> + }
> +
> + TCGv_i64 t0 = tcg_temp_new_i64();
> + TCGv_i64 t1 = tcg_temp_new_i64();
> + TCGv_i64 t2 = tcg_temp_new_i64();
TCGv_i64 t0, t1, t2;
if (i4 & ~7) {
gen_program_exception(s, PGM_SPECIFICATION);
return DISAS_NORETURN;
}
t0 = tcg_temp_new_i64();
t1 = tcg_temp_new_i64();
t2 = tcg_temp_new_i64();
> +
> + read_vec_element_i64(t0, get_field(s, v2), 1, ES_64);
> + read_vec_element_i64(t1, get_field(s, v3), 0, ES_64);
> + read_vec_element_i64(t2, get_field(s, v3), 1, ES_64);
> +
> + tcg_gen_extract2_i64(t0, t1, t0, i4);
> + tcg_gen_extract2_i64(t1, t2, t1, i4);
> +
> write_vec_element_i64(t0, get_field(s, v1), 0, ES_64);
> write_vec_element_i64(t1, get_field(s, v1), 1, ES_64);
>
> diff --git a/target/s390x/tcg/insn-data.def b/target/s390x/tcg/insn-data.def
> index f487a64abf..98a31a557d 100644
> --- a/target/s390x/tcg/insn-data.def
> +++ b/target/s390x/tcg/insn-data.def
> @@ -1207,12 +1207,16 @@
> E(0xe774, VSL, VRR_c, V, 0, 0, 0, 0, vsl, 0, 0, IF_VEC)
> /* VECTOR SHIFT LEFT BY BYTE */
> E(0xe775, VSLB, VRR_c, V, 0, 0, 0, 0, vsl, 0, 1, IF_VEC)
> +/* VECTOR SHIFT LEFT DOUBLE BY BIT */
> + E(0xe786, VSLD, VRI_d, VE2, 0, 0, 0, 0, vsld, 0, 0, IF_VEC)
> /* VECTOR SHIFT LEFT DOUBLE BY BYTE */
> - F(0xe777, VSLDB, VRI_d, V, 0, 0, 0, 0, vsldb, 0, IF_VEC)
> + E(0xe777, VSLDB, VRI_d, V, 0, 0, 0, 0, vsld, 0, 1, IF_VEC)
> /* VECTOR SHIFT RIGHT ARITHMETIC */
> E(0xe77e, VSRA, VRR_c, V, 0, 0, 0, 0, vsra, 0, 0, IF_VEC)
> /* VECTOR SHIFT RIGHT ARITHMETIC BY BYTE */
> E(0xe77f, VSRAB, VRR_c, V, 0, 0, 0, 0, vsra, 0, 1, IF_VEC)
> +/* VECTOR SHIFT RIGHT DOUBLE BY BIT */
> + F(0xe787, VSRD, VRI_d, VE2, 0, 0, 0, 0, vsrd, 0, IF_VEC)
> /* VECTOR SHIFT RIGHT LOGICAL */
> E(0xe77c, VSRL, VRR_c, V, 0, 0, 0, 0, vsrl, 0, 0, IF_VEC)
> /* VECTOR SHIFT RIGHT LOGICAL BY BYTE */
--
Thanks,
David / dhildenb
- Re: [PATCH v3 01/11] tcg: Implement tcg_gen_{h,w}swap_{i32,i64}, (continued)
- [PATCH v3 04/11] target/s390x: vxeh2: Update for changes to vector shifts, Richard Henderson, 2022/03/07
- [PATCH v3 05/11] target/s390x: vxeh2: vector shift double by bit, Richard Henderson, 2022/03/07
- Re: [PATCH v3 05/11] target/s390x: vxeh2: vector shift double by bit,
David Hildenbrand <=
- [PATCH v3 07/11] target/s390x: vxeh2: vector {load, store} byte reversed elements, Richard Henderson, 2022/03/07
- [PATCH v3 06/11] target/s390x: vxeh2: vector {load, store} elements reversed, Richard Henderson, 2022/03/07
[PATCH v3 08/11] target/s390x: vxeh2: vector {load, store} byte reversed element, Richard Henderson, 2022/03/07
[PATCH v3 09/11] target/s390x: add S390_FEAT_VECTOR_ENH2 to cpu max, Richard Henderson, 2022/03/07