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Re: [Qemu-trivial] [PATCH] softfloat: fix mask in extractFloat32Exp
From: |
Stefan Hajnoczi |
Subject: |
Re: [Qemu-trivial] [PATCH] softfloat: fix mask in extractFloat32Exp |
Date: |
Fri, 5 Apr 2013 14:52:23 +0200 |
User-agent: |
Mutt/1.5.21 (2010-09-15) |
On Fri, Mar 29, 2013 at 01:00:42PM +0100, Alexander Aring wrote:
> This will fix the mask of extractFloat32Exp from 0xFF to 0x7F.
> On bit 0x80 is the sign bit of IEEE 754.
>
> Signed-off-by: Alexander Aring <address@hidden>
> ---
> fpu/softfloat.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
> index 83ccc4b..4e8ed79 100644
> --- a/fpu/softfloat.c
> +++ b/fpu/softfloat.c
> @@ -221,7 +221,7 @@ INLINE uint32_t extractFloat32Frac( float32 a )
> INLINE int_fast16_t extractFloat32Exp(float32 a)
> {
>
> - return ( float32_val(a)>>23 ) & 0xFF;
> + return ( float32_val(a)>>23 ) & 0x7F;
This patch seems wrong because the fraction is 23 bits, exponent is 8
bits, and sign is 1 bit.
IEEE 754 Binary32 representation:
SEEEEEEEEFFFFFFFFFFFFFFFFFFFFFFF
3 2 0
0 3
http://en.wikipedia.org/wiki/Binary32
Since the exponent is *8* bits, 0xFF is correct. The sign bit is 0x100
after >>23.
Stefan
- Re: [Qemu-trivial] [PATCH] softfloat: fix mask in extractFloat32Exp,
Stefan Hajnoczi <=